Lines Matching defs:VTs
91 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
92 SDVTList Res = {VTs, NumVTs};
725 ID.AddPointer(VTList.VTs);
1770 SDVTList VTs = getVTList(EltVT);
1772 AddNodeIDNode(ID, Opc, VTs, {});
1782 N = newSDNode<ConstantSDNode>(isT, isO, Elt, VTs);
1850 SDVTList VTs = getVTList(EltVT);
1852 AddNodeIDNode(ID, Opc, VTs, {});
1861 N = newSDNode<ConstantFPSDNode>(isTarget, Elt, VTs);
1908 SDVTList VTs = getVTList(VT);
1910 AddNodeIDNode(ID, Opc, VTs, {});
1919 Opc, DL.getIROrder(), DL.getDebugLoc(), GV, VTs, Offset, TargetFlags);
1927 SDVTList VTs = getVTList(VT);
1929 AddNodeIDNode(ID, Opc, VTs, {});
1935 auto *N = newSDNode<FrameIndexSDNode>(FI, VTs, isTarget);
1946 SDVTList VTs = getVTList(VT);
1948 AddNodeIDNode(ID, Opc, VTs, {});
1955 auto *N = newSDNode<JumpTableSDNode>(JTI, VTs, isTarget, TargetFlags);
1978 SDVTList VTs = getVTList(VT);
1980 AddNodeIDNode(ID, Opc, VTs, {});
1989 auto *N = newSDNode<ConstantPoolSDNode>(isTarget, C, VTs, Offset, *Alignment,
2006 SDVTList VTs = getVTList(VT);
2008 AddNodeIDNode(ID, Opc, VTs, {});
2017 auto *N = newSDNode<ConstantPoolSDNode>(isTarget, C, VTs, Offset, *Alignment,
2290 SDVTList VTs = getVTList(VT);
2293 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, VTs, Ops);
2307 auto *N = newSDNode<ShuffleVectorSDNode>(VTs, dl.getIROrder(),
2329 SDVTList VTs = getVTList(VT);
2331 AddNodeIDNode(ID, ISD::Register, VTs, {});
2337 auto *N = newSDNode<RegisterSDNode>(Reg, VTs);
2386 SDVTList VTs = getVTList(VT);
2389 AddNodeIDNode(ID, Opc, VTs, {});
2397 auto *N = newSDNode<BlockAddressSDNode>(Opc, VTs, BA, Offset, TargetFlags);
2442 SDVTList VTs = getVTList(VT);
2445 AddNodeIDNode(ID, ISD::ADDRSPACECAST, VTs, Ops);
2454 VTs, SrcAS, DestAS);
4071 // MemoryVT (which may or may not be vector) and the range VTs original
6182 SDVTList VTs = getVTList(VT);
6184 AddNodeIDNode(ID, Opcode, VTs, {});
6189 auto *N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
6526 SDVTList VTs = getVTList(VT);
6530 AddNodeIDNode(ID, Opcode, VTs, Ops);
6537 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
6542 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
7188 SDVTList VTs = getVTList(Val.getValueType());
7190 AddNodeIDNode(ID, ISD::AssertAlign, VTs, {Val});
7198 newSDNode<AssertAlignSDNode>(DL.getIROrder(), DL.getDebugLoc(), VTs, A);
7595 "Extract subvector VTs must be vectors!");
7597 "Extract subvector VTs must have the same element type!");
7691 SDVTList VTs = getVTList(VT);
7695 AddNodeIDNode(ID, Opcode, VTs, Ops);
7702 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
7707 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
7828 "Insert subvector VTs must be vectors!");
7830 "Insert subvector VTs must have the same element type!");
7889 SDVTList VTs = getVTList(VT);
7893 AddNodeIDNode(ID, Opcode, VTs, Ops);
7900 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
7905 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
8986 EVT MemVT, SDVTList VTs, SDValue Chain,
8994 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO);
9017 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
9020 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO);
9028 SDVTList VTs = getVTList(VT, MVT::Other);
9030 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO);
9038 SmallVector<EVT, 4> VTs;
9039 VTs.reserve(Ops.size());
9041 VTs.push_back(Op.getValueType());
9042 return getNode(ISD::MERGE_VALUES, dl, getVTList(VTs), Ops);
9073 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
9107 const auto VTs = getVTList(MVT::Other);
9115 AddNodeIDNode(ID, Opcode, VTs, Ops);
9124 Opcode, dl.getIROrder(), dl.getDebugLoc(), VTs, Size, Offset);
9137 const auto VTs = getVTList(MVT::Other);
9140 AddNodeIDNode(ID, Opcode, VTs, Ops);
9148 Opcode, Dl.getIROrder(), Dl.getDebugLoc(), VTs, Guid, Index, Attr);
9244 SDVTList VTs = Indexed ?
9248 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops);
9251 dl.getIROrder(), VTs, AM, ExtType, MemVT, MMO));
9259 auto *N = newSDNode<LoadSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs, AM,
9345 SDVTList VTs = getVTList(MVT::Other);
9349 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
9352 dl.getIROrder(), VTs, ISD::UNINDEXED, false, VT, MMO));
9360 auto *N = newSDNode<StoreSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs,
9412 SDVTList VTs = getVTList(MVT::Other);
9416 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
9419 dl.getIROrder(), VTs, ISD::UNINDEXED, true, SVT, MMO));
9427 auto *N = newSDNode<StoreSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs,
9443 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
9446 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
9455 auto *N = newSDNode<StoreSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs, AM,
9499 SDVTList VTs = Indexed ? getVTList(VT, Ptr.getValueType(), MVT::Other)
9503 AddNodeIDNode(ID, ISD::VP_LOAD, VTs, Ops);
9506 dl.getIROrder(), VTs, AM, ExtType, IsExpanding, MemVT, MMO));
9514 auto *N = newSDNode<VPLoadSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs, AM,
9592 SDVTList VTs = Indexed ? getVTList(Ptr.getValueType(), MVT::Other)
9596 AddNodeIDNode(ID, ISD::VP_STORE, VTs, Ops);
9599 dl.getIROrder(), VTs, AM, IsTruncating, IsCompressing, MemVT, MMO));
9607 auto *N = newSDNode<VPStoreSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs, AM,
9663 SDVTList VTs = getVTList(MVT::Other);
9667 AddNodeIDNode(ID, ISD::VP_STORE, VTs, Ops);
9670 dl.getIROrder(), VTs, ISD::UNINDEXED, true, IsCompressing, SVT, MMO));
9679 newSDNode<VPStoreSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs,
9695 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
9699 AddNodeIDNode(ID, ISD::VP_STORE, VTs, Ops);
9709 dl.getIROrder(), dl.getDebugLoc(), VTs, AM, ST->isTruncatingStore(),
9728 SDVTList VTs = Indexed ? getVTList(VT, Ptr.getValueType(), MVT::Other)
9731 AddNodeIDNode(ID, ISD::EXPERIMENTAL_VP_STRIDED_LOAD, VTs, Ops);
9734 DL.getIROrder(), VTs, AM, ExtType, IsExpanding, MemVT, MMO));
9744 newSDNode<VPStridedLoadSDNode>(DL.getIROrder(), DL.getDebugLoc(), VTs, AM,
9783 SDVTList VTs = Indexed ? getVTList(Ptr.getValueType(), MVT::Other)
9787 AddNodeIDNode(ID, ISD::EXPERIMENTAL_VP_STRIDED_STORE, VTs, Ops);
9790 DL.getIROrder(), VTs, AM, IsTruncating, IsCompressing, MemVT, MMO));
9798 VTs, AM, IsTruncating,
9832 SDVTList VTs = getVTList(MVT::Other);
9836 AddNodeIDNode(ID, ISD::EXPERIMENTAL_VP_STRIDED_STORE, VTs, Ops);
9839 DL.getIROrder(), VTs, ISD::UNINDEXED, true, IsCompressing, SVT, MMO));
9847 VTs, ISD::UNINDEXED, true,
9858 SDValue SelectionDAG::getGatherVP(SDVTList VTs, EVT VT, const SDLoc &dl,
9864 AddNodeIDNode(ID, ISD::VP_GATHER, VTs, Ops);
9867 dl.getIROrder(), VTs, VT, MMO, IndexType));
9876 auto *N = newSDNode<VPGatherSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs,
9901 SDValue SelectionDAG::getScatterVP(SDVTList VTs, EVT VT, const SDLoc &dl,
9908 AddNodeIDNode(ID, ISD::VP_SCATTER, VTs, Ops);
9911 dl.getIROrder(), VTs, VT, MMO, IndexType));
9919 auto *N = newSDNode<VPScatterSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs,
9954 SDVTList VTs = Indexed ? getVTList(VT, Base.getValueType(), MVT::Other)
9958 AddNodeIDNode(ID, ISD::MLOAD, VTs, Ops);
9961 dl.getIROrder(), VTs, AM, ExtTy, isExpanding, MemVT, MMO));
9969 auto *N = newSDNode<MaskedLoadSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs,
10002 SDVTList VTs = Indexed ? getVTList(Base.getValueType(), MVT::Other)
10006 AddNodeIDNode(ID, ISD::MSTORE, VTs, Ops);
10009 dl.getIROrder(), VTs, AM, IsTruncating, IsCompressing, MemVT, MMO));
10018 newSDNode<MaskedStoreSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs, AM,
10040 SDValue SelectionDAG::getMaskedGather(SDVTList VTs, EVT MemVT, const SDLoc &dl,
10048 AddNodeIDNode(ID, ISD::MGATHER, VTs, Ops);
10051 dl.getIROrder(), VTs, MemVT, MMO, IndexType, ExtTy));
10061 VTs, MemVT, MMO, IndexType, ExtTy);
10087 SDValue SelectionDAG::getMaskedScatter(SDVTList VTs, EVT MemVT, const SDLoc &dl,
10095 AddNodeIDNode(ID, ISD::MSCATTER, VTs, Ops);
10098 dl.getIROrder(), VTs, MemVT, MMO, IndexType, IsTrunc));
10108 VTs, MemVT, MMO, IndexType, IsTrunc);
10133 SDValue SelectionDAG::getMaskedHistogram(SDVTList VTs, EVT MemVT,
10140 AddNodeIDNode(ID, ISD::EXPERIMENTAL_VECTOR_HISTOGRAM, VTs, Ops);
10143 dl.getIROrder(), VTs, MemVT, MMO, IndexType));
10153 VTs, MemVT, MMO, IndexType);
10174 SDVTList VTs = getVTList(MVT::Other);
10177 AddNodeIDNode(ID, ISD::GET_FPENV_MEM, VTs, Ops);
10180 ISD::GET_FPENV_MEM, dl.getIROrder(), VTs, MemVT, MMO));
10188 dl.getDebugLoc(), VTs, MemVT, MMO);
10201 SDVTList VTs = getVTList(MVT::Other);
10204 AddNodeIDNode(ID, ISD::SET_FPENV_MEM, VTs, Ops);
10207 ISD::SET_FPENV_MEM, dl.getIROrder(), VTs, MemVT, MMO));
10215 dl.getDebugLoc(), VTs, MemVT, MMO);
10437 SDVTList VTs = getVTList(VT);
10441 AddNodeIDNode(ID, Opcode, VTs, Ops);
10449 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
10454 N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
10481 return getNode(Opcode, DL, VTList.VTs[0], Ops, Flags);
10496 assert(VTList.VTs[0].isInteger() && VTList.VTs[1].isInteger() &&
10498 Ops[0].getValueType() == VTList.VTs[0] &&
10507 SDValue ZeroOverFlow = getConstant(0, DL, VTList.VTs[1]);
10511 if (VTList.VTs[0].isVector() &&
10512 VTList.VTs[0].getVectorElementType() == MVT::i1 &&
10513 VTList.VTs[1].getVectorElementType() == MVT::i1) {
10519 {getNode(ISD::XOR, DL, VTList.VTs[0], F1, F2),
10520 getNode(ISD::AND, DL, VTList.VTs[1], F1, F2)},
10524 SDValue NotF1 = getNOT(DL, F1, VTList.VTs[0]);
10526 {getNode(ISD::XOR, DL, VTList.VTs[0], F1, F2),
10527 getNode(ISD::AND, DL, VTList.VTs[1], NotF1, F2)},
10539 assert(VTList.VTs[0].isInteger() && VTList.VTs[1].isInteger() &&
10541 Ops[0].getValueType() == VTList.VTs[0] &&
10542 Ops[2].getValueType() == VTList.VTs[1] &&
10548 assert(VTList.VTs[0].isInteger() && VTList.VTs[0] == VTList.VTs[1] &&
10549 VTList.VTs[0] == Ops[0].getValueType() &&
10550 VTList.VTs[0] == Ops[1].getValueType() &&
10556 unsigned Width = VTList.VTs[0].getScalarSizeInBits();
10570 getConstant(Val.extractBits(Width, Width), DL, VTList.VTs[0]);
10571 SDValue Lo = getConstant(Val.trunc(Width), DL, VTList.VTs[0]);
10578 assert(VTList.VTs[0].isFloatingPoint() && VTList.VTs[1].isInteger() &&
10579 VTList.VTs[0] == Ops[0].getValueType() && "frexp type mismatch");
10585 SDValue Result0 = getConstantFP(FrexpMant, DL, VTList.VTs[0]);
10587 getConstant(FrexpMant.isFinite() ? FrexpExp : 0, DL, VTList.VTs[1]);
10596 assert(VTList.VTs[0].isFloatingPoint() &&
10598 assert(VTList.VTs[0].isVector() == Ops[1].getValueType().isVector() &&
10601 assert((!VTList.VTs[0].isVector() ||
10602 VTList.VTs[0].getVectorElementCount() ==
10605 assert(Ops[1].getValueType().bitsLT(VTList.VTs[0]) &&
10610 assert(VTList.VTs[0].isVector() == Ops[1].getValueType().isVector() &&
10613 assert((!VTList.VTs[0].isVector() ||
10614 VTList.VTs[0].getVectorElementCount() ==
10617 assert(VTList.VTs[0].isFloatingPoint() &&
10619 VTList.VTs[0].bitsLT(Ops[1].getValueType()) &&
10648 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
10775 SDVTList SelectionDAG::getVTList(ArrayRef<EVT> VTs) {
10776 unsigned NumVTs = VTs.size();
10780 ID.AddInteger(VTs[index].getRawBits());
10787 llvm::copy(VTs, Array);
10943 SDVTList VTs = getVTList(VT);
10944 return SelectNodeTo(N, MachineOpc, VTs, {});
10949 SDVTList VTs = getVTList(VT);
10951 return SelectNodeTo(N, MachineOpc, VTs, Ops);
10957 SDVTList VTs = getVTList(VT);
10959 return SelectNodeTo(N, MachineOpc, VTs, Ops);
10965 SDVTList VTs = getVTList(VT);
10967 return SelectNodeTo(N, MachineOpc, VTs, Ops);
10972 SDVTList VTs = getVTList(VT);
10973 return SelectNodeTo(N, MachineOpc, VTs, Ops);
10978 SDVTList VTs = getVTList(VT1, VT2);
10979 return SelectNodeTo(N, MachineOpc, VTs, Ops);
10984 SDVTList VTs = getVTList(VT1, VT2);
10985 return SelectNodeTo(N, MachineOpc, VTs, {});
10991 SDVTList VTs = getVTList(VT1, VT2, VT3);
10992 return SelectNodeTo(N, MachineOpc, VTs, Ops);
10998 SDVTList VTs = getVTList(VT1, VT2);
11000 return SelectNodeTo(N, MachineOpc, VTs, Ops);
11004 SDVTList VTs,ArrayRef<SDValue> Ops) {
11005 SDNode *New = MorphNodeTo(N, ~MachineOpc, VTs, Ops);
11049 SDVTList VTs, ArrayRef<SDValue> Ops) {
11052 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
11054 AddNodeIDNode(ID, Opc, VTs, Ops);
11064 N->ValueList = VTs.VTs;
11065 N->NumValues = VTs.NumVTs;
11125 SDVTList VTs = getVTList(Node->getValueType(0));
11126 SDNode *Res = MorphNodeTo(Node, NewOpc, VTs, Ops);
11151 SDVTList VTs = getVTList(VT);
11152 return getMachineNode(Opcode, dl, VTs, {});
11157 SDVTList VTs = getVTList(VT);
11159 return getMachineNode(Opcode, dl, VTs, Ops);
11164 SDVTList VTs = getVTList(VT);
11166 return getMachineNode(Opcode, dl, VTs, Ops);
11172 SDVTList VTs = getVTList(VT);
11174 return getMachineNode(Opcode, dl, VTs, Ops);
11179 SDVTList VTs = getVTList(VT);
11180 return getMachineNode(Opcode, dl, VTs, Ops);
11186 SDVTList VTs = getVTList(VT1, VT2);
11188 return getMachineNode(Opcode, dl, VTs, Ops);
11194 SDVTList VTs = getVTList(VT1, VT2);
11196 return getMachineNode(Opcode, dl, VTs, Ops);
11202 SDVTList VTs = getVTList(VT1, VT2);
11203 return getMachineNode(Opcode, dl, VTs, Ops);
11209 SDVTList VTs = getVTList(VT1, VT2, VT3);
11211 return getMachineNode(Opcode, dl, VTs, Ops);
11218 SDVTList VTs = getVTList(VT1, VT2, VT3);
11220 return getMachineNode(Opcode, dl, VTs, Ops);
11226 SDVTList VTs = getVTList(VT1, VT2, VT3);
11227 return getMachineNode(Opcode, dl, VTs, Ops);
11233 SDVTList VTs = getVTList(ResultTys);
11234 return getMachineNode(Opcode, dl, VTs, Ops);
11238 SDVTList VTs,
11240 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
11246 AddNodeIDNode(ID, ~Opcode, VTs, Ops);
11254 N = newSDNode<MachineSDNode>(~Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
11298 if (VTList.VTs[VTList.NumVTs - 1] != MVT::Glue) {
11313 if (VTList.VTs[VTList.NumVTs - 1] != MVT::Glue) {
12432 SDVTList VTs, EVT memvt, MachineMemOperand *mmo)
12433 : SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) {
12457 std::vector<EVT> VTs;
12460 VTs.reserve(MVT::VALUETYPE_SIZE);
12462 VTs.push_back(MVT((MVT::SimpleValueType)i));
12474 return &SimpleVTArray.VTs[VT.SimpleTy];
12859 SDVTList VTs = getVTList(ResEltVT, SVT);
12863 SDValue Res = getNode(Opcode, dl, VTs, LHSScalars[i], RHSScalars[i]);
12945 /// VTs and return the low/high part.
12959 /// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type
12972 /// GetDependentSplitDestVTs - Compute the VTs needed for the low/hi parts of a