Lines Matching defs:VReg

275     Register VReg = MRI->createVirtualRegister(RC);
277             TII->get(TargetOpcode::IMPLICIT_DEF), VReg);
278     return VReg;
325   Register VReg = getVR(Op, VRBaseMap);
333   // shrink VReg's register class within reason.  For example, if VReg == GR32
334   // and II requires a GR32_NOSP, just constrain VReg to GR32_NOSP.
349         = MRI->constrainRegClass(VReg, OpRC, MinNumRegs);
356             .addReg(VReg);
357         VReg = NewVReg;
360            "Constraining an allocatable VReg produced an unallocatable class?");
390   MIB.addReg(VReg, getDefRegState(isOptDef) | getKillRegState(isKill) |
409     Register VReg = R->getReg();
421     if (OpRC && IIRC && OpRC != IIRC && VReg.isVirtual()) {
424                TII->get(TargetOpcode::COPY), NewVReg).addReg(VReg);
425       VReg = NewVReg;
431     MIB.addReg(VReg, getImplRegState(Imp));
473 Register InstrEmitter::ConstrainForSubReg(Register VReg, unsigned SubIdx,
475   const TargetRegisterClass *VRC = MRI->getRegClass(VReg);
478   // RC is a sub-class of VRC that supports SubIdx.  Try to constrain VReg
481     RC = MRI->constrainRegClass(VReg, RC, MinRCSize);
483   // VReg has been adjusted.  It can be used with SubIdx operands now.
485     return VReg;
487   // VReg couldn't be reasonably constrained.  Emit a COPY to a new virtual
493     .addReg(VReg);
634   Register VReg = getVR(Node->getOperand(0), VRBaseMap);
636   // Create the new VReg in the destination class and emit a copy.
642     NewVReg).addReg(VReg);
822   // defines a VReg, it can depend for example on the order blocks are
830   auto AddVRegOp = [&](unsigned VReg) {
832         /* Reg */ VReg, /* isDef */ false, /* isImp */ false,
843     unsigned VReg;
846       VReg = DbgOperand.getVReg();
850       if (!MRI->hasOneDef(VReg)) {
851         AddVRegOp(VReg);
855       DefMI = &*MRI->def_instr_begin(VReg);
857       // Look up the corresponding VReg for the given SDNode, if any.
861       // No VReg -> produce a DBG_VALUE $noreg instead.
866       VReg = getVR(Op, VRBaseMap);
868       // Again, if there's no instruction defining the VReg right now, fix it up
870       if (!MRI->hasOneDef(VReg)) {
871         AddVRegOp(VReg);
875       DefMI = &*MRI->def_instr_begin(VReg);
886       AddVRegOp(VReg);
890     // Find the operand number which defines the specified VReg.
893       if (MO.isReg() && MO.isDef() && MO.getReg() == VReg)
1226       Register VReg = getVR(GluedNode->getOperand(0), VRBaseMap);
1227       MachineOperand MO = MachineOperand::CreateReg(VReg, /*isDef=*/false,