Lines Matching defs:SubIdx

306   void updateRegDefsUses(Register SrcReg, Register DstReg, unsigned SubIdx);
532   assert(!(Dst.isPhysical() && DstSub) && "Cannot have a physical SubIdx");
1863                                           unsigned SubIdx) {
1903     if (DstInt && !Reads && SubIdx && !UseMI->isDebugInstr())
1913       if (SubIdx && MO.isDef())
1919         unsigned SubUseIdx = TRI->composeSubRegIndices(SubIdx, MO.getSubReg());
1924             LaneBitmask UsedLanes = TRI->getSubRegIndexLaneMask(SubIdx);
1944         MO.substVirtReg(DstReg, SubIdx, *TRI);
2462   /// subregister SubIdx in the coalesced register. Either CP.DstIdx or
2464   const unsigned SubIdx;
2467   /// be smaller than the lanemask produced by SubIdx when merging subranges.
2639   JoinVals(LiveRange &LR, Register Reg, unsigned SubIdx, LaneBitmask LaneMask,
2643       : LR(LR), Reg(Reg), SubIdx(SubIdx), LaneMask(LaneMask),
2706         TRI->composeSubRegIndices(SubIdx, MO.getSubReg()));
2739         LaneBitmask SMask = TRI->composeSubRegIndexLaneMask(SubIdx, S.LaneMask);
2805                                      : TRI->getSubRegIndexLaneMask(SubIdx);
3021   if ((TRI->getSubRegIndexLaneMask(Other.SubIdx) & ~V.WriteLanes).none())
3030       LaneBitmask OtherMask = TRI->getSubRegIndexLaneMask(Other.SubIdx);
3039           TRI->composeSubRegIndexLaneMask(Other.SubIdx, OtherSR.LaneMask);
3160 bool JoinVals::usesLanes(const MachineInstr &MI, Register Reg, unsigned SubIdx,
3169     unsigned S = TRI->composeSubRegIndices(SubIdx, MO.getSubReg());
3222       if (usesLanes(*MI, Other.Reg, Other.SubIdx, TaintedLanes)) {