Lines Matching defs:LaneMask

154   /// A LaneMask to remember on which subregister live ranges we need to call
257   /// LaneMask are split as necessary. @p LaneMask are the lanes that
261                          LaneBitmask LaneMask, CoalescerPair &CP,
267                         LaneBitmask LaneMask, const CoalescerPair &CP);
1003       MaskA |= SA.LaneMask;
1006           Allocator, SA.LaneMask,
1023       if ((SB.LaneMask & MaskA).any())
1261     IntB.computeSubRangeUndefs(Undefs, SR.LaneMask, *MRI,
1517       SR.LaneMask = TRI->composeSubRegIndexLaneMask(DstIdx, SR.LaneMask);
1573         MaxMask &= ~SR.LaneMask;
1598         if ((SR.LaneMask & DstMask).none()) {
1601                      << PrintLaneMask(SR.LaneMask) << " : " << SR << "\n");
1738       if ((SR.LaneMask & SrcMask).none())
1786       if ((SR.LaneMask & DstMask).none())
1808         if ((SR.LaneMask & UseMask).none())
1843     if ((S.LaneMask & Mask).none())
2094             PrunedLanes |= S.LaneMask;
2225       if ((S.LaneMask & ShrinkMask).none())
2227       LLVM_DEBUG(dbgs() << "Shrink LaneUses (Lane " << PrintLaneMask(S.LaneMask)
2466   /// The LaneMask that this liverange will occupy the coalesced register. May
2468   const LaneBitmask LaneMask;
2639   JoinVals(LiveRange &LR, Register Reg, unsigned SubIdx, LaneBitmask LaneMask,
2643       : LR(LR), Reg(Reg), SubIdx(SubIdx), LaneMask(LaneMask),
2739         LaneBitmask SMask = TRI->composeSubRegIndexLaneMask(SubIdx, S.LaneMask);
2740         if ((SMask & LaneMask).none())
3028     // any conflict bit in their LaneMask.
3039           TRI->composeSubRegIndexLaneMask(Other.SubIdx, OtherSR.LaneMask);
3184                       << PrintLaneMask(LaneMask) << '\n');
3394         LLVM_DEBUG(dbgs() << "\t\tPrune sublane " << PrintLaneMask(S.LaneMask)
3412           ShrinkMask |= S.LaneMask;
3424                           << PrintLaneMask(S.LaneMask) << " at " << Def
3426         ShrinkMask |= S.LaneMask;
3565                                          LaneBitmask LaneMask,
3568   JoinVals RHSVals(RRange, CP.getSrcReg(), CP.getSrcIdx(), LaneMask, NewVNInfo,
3570   JoinVals LHSVals(LRange, CP.getDstReg(), CP.getDstIdx(), LaneMask, NewVNInfo,
3607   LLVM_DEBUG(dbgs() << "\t\tjoined lanes: " << PrintLaneMask(LaneMask) << ' '
3628                                           LaneBitmask LaneMask,
3633       Allocator, LaneMask,
3640           joinSubRegRanges(SR, RangeCopy, SR.LaneMask, CP);
3697         LaneBitmask Mask = TRI->composeSubRegIndexLaneMask(DstIdx, R.LaneMask);
3698         R.LaneMask = Mask;
3713         LaneBitmask Mask = TRI->composeSubRegIndexLaneMask(SrcIdx, R.LaneMask);
4327             assert((S.LaneMask & ~MaxMask).none());