Lines Matching defs:VirtReg

166 /// canEvictHintInterference - return true if the interference for VirtReg
167 /// on the PhysReg, which is VirtReg's hint, can be evicted in favor of VirtReg.
169     const LiveInterval &VirtReg, MCRegister PhysReg,
173   return canEvictInterferenceBasedOnCost(VirtReg, PhysReg, true, MaxCost,
178 /// VirtReg and PhysReg can be evicted.
180 /// @param VirtReg Live range that is about to be assigned.
182 /// @param IsHint  True when PhysReg is VirtReg's preferred register.
187     const LiveInterval &VirtReg, MCRegister PhysReg, bool IsHint,
190   if (Matrix->checkInterference(VirtReg, PhysReg) > LiveRegMatrix::IK_VirtReg)
193   bool IsLocal = VirtReg.empty() || LIS->intervalIsInOneMBB(VirtReg);
195   // Find VirtReg's cascade number. This will be unassigned if VirtReg was never
202   unsigned Cascade = RA.getExtraInfo().getCascadeOrCurrentNext(VirtReg.reg());
206     LiveIntervalUnion::Query &Q = Matrix->query(VirtReg, Unit);
233           !VirtReg.isSpillable() &&
235            RegClassInfo.getNumAllocatableRegs(MRI->getRegClass(VirtReg.reg())) <
261       if (!shouldEvict(VirtReg, IsHint, *Intf, BreaksHint))
277     const LiveInterval &VirtReg, const AllocationOrder &Order,
283   auto MaybeOrderLimit = getOrderLimit(VirtReg, Order, CostPerUseLimit);
292     BestCost.MaxWeight = VirtReg.weight();
300         !canEvictInterferenceBasedOnCost(VirtReg, PhysReg, false, BestCost,