Lines Matching defs:MO

31 static bool isValidReg(const MachineOperand &MO) {
32 return MO.isReg() && MO.getReg();
35 static bool isValidRegUse(const MachineOperand &MO) {
36 return isValidReg(MO) && MO.isUse();
39 static bool isValidRegUseOf(const MachineOperand &MO, Register Reg,
41 if (!isValidRegUse(MO))
43 return TRI->regsOverlap(MO.getReg(), Reg);
46 static bool isValidRegDef(const MachineOperand &MO) {
47 return isValidReg(MO) && MO.isDef();
50 static bool isValidRegDefOf(const MachineOperand &MO, Register Reg,
52 if (!isValidRegDef(MO))
54 return TRI->regsOverlap(MO.getReg(), Reg);
144 for (auto &MO : MI->operands()) {
145 if (MO.isFI()) {
146 int FrameIndex = MO.getIndex();
161 if (!isValidRegDef(MO))
163 for (MCRegUnit Unit : TRI->regunits(MO.getReg().asMCReg())) {
251 for (MachineOperand &MO : MI.operands()) {
253 if (MO.isFI()) {
254 int FrameIndex = MO.getIndex();
258 } else if (MO.isReg()) {
259 if (MO.isDef())
261 Reg = MO.getReg();
268 MO.print(dbgs(), TRI);
432 for (auto &MO : MI->operands()) {
433 if (!isValidRegUseOf(MO, Reg, TRI))
437 if (MO.isKill())
447 for (auto &MO : MI.operands()) {
448 if (!isValidRegUseOf(MO, Reg, TRI))
549 MachineOperand &MO) const {
550 assert(MO.isReg() && "Expected register operand");
551 return getUniqueReachingMIDef(MI, MO.getReg());
602 for (auto &MO : Last->operands())
603 if (isValidRegDefOf(MO, Reg, TRI))
628 for (auto &MO : Last->operands())
629 if (isValidRegDefOf(MO, Reg, TRI))
652 for (auto &MO : From->operands()) {
653 if (!isValidReg(MO))
655 if (MO.isDef())
656 Defs.insert(MO.getReg());
657 else if (!hasSameReachingDef(From, To, MO.getReg()))
667 for (auto &MO : I->operands())
668 if (MO.isReg() && MO.getReg() && Defs.count(MO.getReg()))
720 for (auto &MO : MI->operands()) {
721 if (!isValidRegDef(MO))
725 getGlobalUses(MI, MO.getReg(), Uses);
746 for (auto &MO : Def->operands()) {
747 if (!isValidRegDef(MO))
749 if (!MO.isDead())
761 for (auto &MO : MI->operands()) {
762 if (!isValidRegUse(MO))
764 if (MachineInstr *Def = getMIOperand(MI, MO))
765 if (IsDead(Def, MO.getReg()))
796 for (auto &MO : I->operands())
797 if (isValidRegDefOf(MO, Reg, TRI))