Lines Matching defs:DefSubReg

712   unsigned DefSubReg;
749   /// \p DefSubReg represents the sub register index the value tracker will
757   ValueTracker(Register Reg, unsigned DefSubReg, const MachineRegisterInfo &MRI,
759       : DefSubReg(DefSubReg), Reg(Reg), MRI(MRI), TII(TII) {
1903   if (Def->getOperand(DefIdx).getSubReg() != DefSubReg)
1925   if (DefOp.getSubReg() != DefSubReg)
1993     if (RegSeqInput.SubIdx == DefSubReg)
2021   // 1. DefSubReg == sub1, get v1.
2022   // 2. DefSubReg != sub1, the value may be available through v0.
2025   if (InsertedReg.SubIdx == DefSubReg) {
2042   if ((TRI->getSubRegIndexLaneMask(DefSubReg) &
2048   return ValueTrackerResult(BaseReg.Reg, DefSubReg);
2058   // Indeed, if DefSubReg != 0, we would have to compose it with sub0.
2059   if (DefSubReg)
2081   // If DefSubReg != sub0, we would have to check that all the bits
2084   if (DefSubReg != Def->getOperand(3).getImm())
2102   if (Def->getOperand(0).getSubReg() != DefSubReg)
2173         DefSubReg = Res.getSrcSubReg(0);