Lines Matching defs:MONum
303 void visitMachineOperand(const MachineOperand *MO, unsigned MONum);
311 void report(const char *msg, const MachineOperand *MO, unsigned MONum,
329 void checkLiveness(const MachineOperand *MO, unsigned MONum);
330 void checkLivenessAtUse(const MachineOperand *MO, unsigned MONum,
334 void checkLivenessAtDef(const MachineOperand *MO, unsigned MONum,
619 unsigned MONum, LLT MOVRegType) {
622 OS << "- operand " << MONum << ": ";
2508 MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) {
2513 NumDefs = (MONum == 0 && MO->isReg()) ? NumDefs : 0;
2516 if (MONum < NumDefs) {
2517 const MCOperandInfo &MCOI = MCID.operands()[MONum];
2519 report("Explicit definition must be a register", MO, MONum);
2521 report("Explicit definition marked as use", MO, MONum);
2523 report("Explicit definition marked as implicit", MO, MONum);
2524 } else if (MONum < MCID.getNumOperands()) {
2525 const MCOperandInfo &MCOI = MCID.operands()[MONum];
2528 bool IsOptional = MI->isVariadic() && MONum == MCID.getNumOperands() - 1;
2532 report("Explicit operand marked as def", MO, MONum);
2534 report("Explicit operand marked as implicit", MO, MONum);
2540 report("Expected a register operand.", MO, MONum);
2545 report("Expected a non-register operand.", MO, MONum);
2549 int TiedTo = MCID.getOperandConstraint(MONum, MCOI::TIED_TO);
2552 report("Tied use must be a register", MO, MONum);
2554 report("Operand should be tied", MO, MONum);
2555 else if (unsigned(TiedTo) != MI->findTiedOperandIdx(MONum))
2556 report("Tied def doesn't match MCInstrDesc", MO, MONum);
2566 report("Explicit operand should not be tied", MO, MONum);
2570 report("Extra explicit operand on non-variadic instruction", MO, MONum);
2579 report("Register operand must be marked debug", MO, MONum);
2581 report("Register operand must not be marked debug", MO, MONum);
2588 checkLiveness(MO, MONum);
2592 report("Undef virtual register def operands require a subregister", MO, MONum);
2596 unsigned OtherIdx = MI->findTiedOperandIdx(MONum);
2599 report("Must be tied to a register", MO, MONum);
2601 report("Missing tie flags on tied operand", MO, MONum);
2602 if (MI->findTiedOperandIdx(OtherIdx) != MONum)
2603 report("Inconsistent tie links", MO, MONum);
2604 if (MONum < MCID.getNumDefs()) {
2608 MO, MONum);
2611 report("Explicit def should be tied to implicit use", MO, MONum);
2626 MO->isUse() && MI->isRegTiedToDefOperand(MONum, &DefIdx) &&
2628 report("Two-address instruction operands must be identical", MO, MONum);
2635 report("Illegal subregister index for physical register", MO, MONum);
2638 if (MONum < MCID.getNumOperands()) {
2640 TII->getRegClass(MCID, MONum, TRI, *MF)) {
2642 report("Illegal physical register for instruction", MO, MONum);
2650 report("isRenamable set on reserved register", MO, MONum);
2667 report("Generic virtual register use cannot be undef", MO, MONum);
2679 MO, MONum);
2687 MONum);
2698 MO, MONum);
2706 MONum);
2716 MONum);
2724 MONum < MCID.getNumOperands() &&
2725 TII->getRegClass(MCID, MONum, TRI, *MF)) {
2727 MONum);
2729 << TRI->getRegClassName(TII->getRegClass(MCID, MONum, TRI, *MF))
2740 report("Invalid subregister index for virtual register", MO, MONum);
2746 report("Invalid register class for subregister index", MO, MONum);
2752 if (MONum < MCID.getNumOperands()) {
2754 TII->getRegClass(MCID, MONum, TRI, *MF)) {
2759 report("No largest legal super class exists.", MO, MONum);
2764 report("No matching super-reg register class.", MO, MONum);
2769 report("Illegal virtual register for instruction", MO, MONum);
2786 report("PHI operand is not in the CFG", MO, MONum);
2820 report("Instruction loads from dead spill slot", MO, MONum);
2824 report("Instruction stores to dead spill slot", MO, MONum);
2832 report("CFI instruction has invalid index", MO, MONum);
2841 unsigned MONum, SlotIndex UseIdx,
2848 report("invalid live range", MO, MONum);
2860 report("No live segment at use", MO, MONum);
2866 report("Live range continues after kill flag", MO, MONum);
2876 unsigned MONum, SlotIndex DefIdx,
2882 report("invalid live range", MO, MONum);
2903 report("Inconsistent valno->def", MO, MONum);
2912 report("No live segment at def", MO, MONum);
2930 report("Live range continues after dead def flag", MO, MONum);
2940 void MachineVerifier::checkLiveness(const MachineOperand *MO, unsigned MONum) {
2951 report("Live interval for subreg operand has no subranges", MO, MONum);
2953 report("Virtual register has no live interval", MO, MONum);
2969 report("Kill missing from LiveVariables", MO, MONum);
2978 MI->getOperand(MONum + 1).getMBB()).getPrevSlot();
2988 checkLivenessAtUse(MO, MONum, UseIdx, *LR, VirtRegOrUnit(Unit));
2994 checkLivenessAtUse(MO, MONum, UseIdx, *LI, VirtRegOrUnit(Reg));
3004 checkLivenessAtUse(MO, MONum, UseIdx, SR, VirtRegOrUnit(Reg),
3012 report("No live subrange at use", MO, MONum);
3018 report("Not all lanes of PHI source live at use", MO, MONum);
3062 report("Using an undefined physical register", MO, MONum);
3064 report("Reading virtual register without a def", MO, MONum);
3071 report("Using a killed virtual register", MO, MONum);
3089 report("Multiple virtual register defs in SSA form", MO, MONum);
3097 checkLivenessAtDef(MO, MONum, DefIdx, *LI, VirtRegOrUnit(Reg));
3106 checkLivenessAtDef(MO, MONum, DefIdx, SR, VirtRegOrUnit(Reg), true,