Lines Matching defs:Unit
189 for (unsigned Unit = 0, UnitE = RegUnitRanges.size(); Unit != UnitE; ++Unit)
190 if (LiveRange *LR = RegUnitRanges[Unit])
191 OS << printRegUnit(Unit, TRI) << ' ' << *LR << '\n';
299 // Register Unit Liveness
312 void LiveIntervals::computeRegUnitRange(LiveRange &LR, unsigned Unit) {
316 // The physregs aliasing Unit are the roots and their super-registers.
322 for (MCRegUnitRootIterator Root(Unit, TRI); Root.isValid(); ++Root) {
334 assert(IsReserved == MRI->isReservedRegUnit(Unit) &&
340 for (MCRegUnitRootIterator Root(Unit, TRI); Root.isValid(); ++Root) {
373 for (MCRegUnit Unit : TRI->regunits(LI.PhysReg)) {
374 LiveRange *LR = RegUnitRanges[Unit];
377 LR = RegUnitRanges[Unit] = new LiveRange(UseSegmentSetForPhysRegs);
378 NewRanges.push_back(Unit);
382 LLVM_DEBUG(dbgs() << ' ' << printRegUnit(Unit, TRI) << '#' << VNI->id);
390 for (unsigned Unit : NewRanges)
391 computeRegUnitRange(*RegUnitRanges[Unit], Unit);
749 auto [Unit, Bitmask] = *UI;
751 if (TRI->isArtificialRegUnit(Unit))
753 const LiveRange &RURange = getRegUnit(Unit);
1046 LiveRange *getRegUnitLI(unsigned Unit) {
1047 if (UpdateFlags && !MRI.isReservedRegUnit(Unit))
1048 return &LIS.getRegUnit(Unit);
1049 return LIS.getCachedRegUnit(Unit);
1111 for (MCRegUnit Unit : TRI.regunits(Reg.asMCReg()))
1112 if (LiveRange *LR = getRegUnitLI(Unit))
1113 updateRange(*LR, VirtRegOrUnit(Unit), LaneBitmask::getNone());
1777 for (MCRegUnit Unit : TRI->regunits(Reg)) {
1778 if (LiveRange *LR = getCachedRegUnit(Unit))