Lines Matching defs:LR
153 for (LiveRange *LR : RegUnitRanges)
154 delete LR;
190 if (LiveRange *LR = RegUnitRanges[Unit])
191 OS << printRegUnit(Unit, TRI) << ' ' << *LR << '\n';
312 void LiveIntervals::computeRegUnitRange(LiveRange &LR, unsigned Unit) {
326 LICalc->createDeadDefs(LR, Reg);
337 // Now extend LR to reach all uses.
343 LICalc->extendToUses(LR, Reg);
350 LR.flushSegmentSet();
374 LiveRange *LR = RegUnitRanges[Unit];
375 if (!LR) {
377 LR = RegUnitRanges[Unit] = new LiveRange(UseSegmentSetForPhysRegs);
380 VNInfo *VNI = LR->createDeadDef(Begin, getVNInfoAllocator());
394 static void createSegmentsForValues(LiveRange &LR,
400 LR.addSegment(LiveRange::Segment(Def, Def.getDeadSlot(), VNI));
656 void LiveIntervals::extendToIndices(LiveRange &LR,
662 LICalc->extend(LR, Idx, /*PhysReg=*/0, Undefs);
665 void LiveIntervals::pruneValue(LiveRange &LR, SlotIndex Kill,
667 LiveQueryResult LRQ = LR.Query(Kill);
677 LR.removeSegment(Kill, LRQ.endPoint());
683 LR.removeSegment(Kill, MBBEnd);
700 LiveQueryResult LRQ = LR.Query(MBBStart);
709 LR.removeSegment(MBBStart, LRQ.endPoint());
716 LR.removeSegment(MBBStart, MBBEnd);
1112 if (LiveRange *LR = getRegUnitLI(Unit))
1113 updateRange(*LR, VirtRegOrUnit(Unit), LaneBitmask::getNone());
1122 void updateRange(LiveRange &LR, VirtRegOrUnit VRegOrUnit,
1124 if (!Updated.insert(&LR).second)
1135 dbgs() << ":\t" << LR << '\n';
1138 handleMoveDown(LR);
1140 handleMoveUp(LR, VRegOrUnit, LaneMask);
1141 LLVM_DEBUG(dbgs() << " -->\t" << LR << '\n');
1142 assert(LR.verify());
1145 /// Update LR to reflect an instruction has been moved downwards from OldIdx
1147 void handleMoveDown(LiveRange &LR) {
1148 LiveRange::iterator E = LR.end();
1150 LiveRange::iterator OldIdxIn = LR.find(OldIdx.getBaseIndex());
1177 LR.advanceTo(Next, NewIdx.getBaseIndex());
1189 // Adjust OldIdxIn->end to reach NewIdx. This may temporarily make LR
1226 = LR.advanceTo(OldIdxOut, NewIdx.getRegSlot());
1232 if (OldIdxOut != LR.begin() &&
1300 LR.removeValNo(OldIdxVNI);
1318 /// Update LR to reflect an instruction has been moved upwards from OldIdx
1320 void handleMoveUp(LiveRange &LR, VirtRegOrUnit VRegOrUnit,
1322 LiveRange::iterator E = LR.end();
1324 LiveRange::iterator OldIdxIn = LR.find(OldIdx.getBaseIndex());
1353 OldIdxIn = OldIdxOut != LR.begin() ? std::prev(OldIdxOut) : E;
1366 LiveRange::iterator NewIdxOut = LR.find(NewIdx.getRegSlot());
1376 LR.removeValNo(NewIdxOut->valno);
1379 LR.removeValNo(OldIdxVNI);
1390 assert(NewIdxIn == LR.find(NewIdx.getBaseIndex()));
1396 if (OldIdxIn != LR.begin() &&
1445 // another value in LR. That can happen when LR is a whole register,
1448 // in LR, so move OldIdxOut up to NewIdxOut. Slide [NewIdxOut;OldIdxOut)
1473 // in LR, so move OldIdxOut up to NewIdxOut. Slide [NewIdxOut;OldIdxOut)
1615 const SlotIndex EndIdx, LiveRange &LR,
1618 LiveInterval::iterator LII = LR.find(EndIdx);
1620 if (LII != LR.end() && LII->start < EndIdx) {
1622 } else if (LII == LR.begin()) {
1653 LII = LR.removeSegment(LII, true);
1654 if (LII != LR.begin())
1668 VNInfo *VNI = LR.getNextValue(instrIdx.getRegSlot(), VNInfoAllocator);
1671 LII = LR.addSegment(S);
1673 VNInfo *VNI = LR.getNextValue(instrIdx.getRegSlot(), VNInfoAllocator);
1675 LII = LR.addSegment(S);
1696 LR.removeSegment(*LII, true);
1778 if (LiveRange *LR = getCachedRegUnit(Unit))
1779 if (VNInfo *VNI = LR->getVNInfoAt(Pos))
1780 LR->removeValNo(VNI);