Lines Matching defs:Res
136 MachineInstrBuilder MachineIRBuilder::buildDynStackAlloc(const DstOp &Res,
139 assert(Res.getLLTTy(*getMRI()).isPointer() && "expected ptr dst type");
141 Res.addDefToMIB(*getMRI(), MIB);
147 MachineInstrBuilder MachineIRBuilder::buildFrameIndex(const DstOp &Res,
149 assert(Res.getLLTTy(*getMRI()).isPointer() && "invalid operand type");
151 Res.addDefToMIB(*getMRI(), MIB);
156 MachineInstrBuilder MachineIRBuilder::buildGlobalValue(const DstOp &Res,
158 assert(Res.getLLTTy(*getMRI()).isPointer() && "invalid operand type");
159 assert(Res.getLLTTy(*getMRI()).getAddressSpace() ==
164 Res.addDefToMIB(*getMRI(), MIB);
169 MachineInstrBuilder MachineIRBuilder::buildConstantPool(const DstOp &Res,
171 assert(Res.getLLTTy(*getMRI()).isPointer() && "invalid operand type");
173 Res.addDefToMIB(*getMRI(), MIB);
184 void MachineIRBuilder::validateUnaryOp(const LLT Res, const LLT Op0) {
185 assert((Res.isScalar() || Res.isVector()) && "invalid operand type");
186 assert((Res == Op0) && "type mismatch");
189 void MachineIRBuilder::validateBinaryOp(const LLT Res, const LLT Op0,
191 assert((Res.isScalar() || Res.isVector()) && "invalid operand type");
192 assert((Res == Op0 && Res == Op1) && "type mismatch");
195 void MachineIRBuilder::validateShiftOp(const LLT Res, const LLT Op0,
197 assert((Res.isScalar() || Res.isVector()) && "invalid operand type");
198 assert((Res == Op0) && "type mismatch");
202 MachineIRBuilder::buildPtrAdd(const DstOp &Res, const SrcOp &Op0,
204 assert(Res.getLLTTy(*getMRI()).isPointerOrPointerVector() &&
205 Res.getLLTTy(*getMRI()) == Op0.getLLTTy(*getMRI()) && "type mismatch");
208 return buildInstr(TargetOpcode::G_PTR_ADD, {Res}, {Op0, Op1}, Flags);
212 MachineIRBuilder::materializePtrAdd(Register &Res, Register Op0,
214 assert(Res == 0 && "Res is a result argument");
218 Res = Op0;
222 Res = getMRI()->createGenericVirtualRegister(getMRI()->getType(Op0));
224 return buildPtrAdd(Res, Op0, Cst.getReg(0));
227 MachineInstrBuilder MachineIRBuilder::buildMaskLowPtrBits(const DstOp &Res,
230 LLT PtrTy = Res.getLLTTy(*getMRI());
234 return buildPtrMask(Res, Op0, MaskReg);
238 MachineIRBuilder::buildPadVectorWithUndefElements(const DstOp &Res,
240 LLT ResTy = Res.getLLTTy(*getMRI());
243 assert(ResTy.isVector() && "Res non vector type");
265 return buildMergeLikeInstr(Res, Regs);
269 MachineIRBuilder::buildDeleteTrailingVectorElements(const DstOp &Res,
271 LLT ResTy = Res.getLLTTy(*getMRI());
285 return buildCopy(Res, Unmerge.getReg(0));
289 return buildMergeLikeInstr(Res, Regs);
312 MachineInstrBuilder MachineIRBuilder::buildCopy(const DstOp &Res,
314 return buildInstr(TargetOpcode::COPY, Res, Op);
317 MachineInstrBuilder MachineIRBuilder::buildConstant(const DstOp &Res,
319 LLT Ty = Res.getLLTTy(*getMRI());
331 return buildSplatBuildVector(Res, Const);
336 Res.addDefToMIB(*getMRI(), Const);
341 MachineInstrBuilder MachineIRBuilder::buildConstant(const DstOp &Res,
344 Res.getLLTTy(*getMRI()).getScalarSizeInBits());
346 return buildConstant(Res, *CI);
349 MachineInstrBuilder MachineIRBuilder::buildFConstant(const DstOp &Res,
351 LLT Ty = Res.getLLTTy(*getMRI());
368 return buildSplatBuildVector(Res, Const);
373 Res.addDefToMIB(*getMRI(), Const);
378 MachineInstrBuilder MachineIRBuilder::buildConstant(const DstOp &Res,
381 return buildConstant(Res, *CI);
384 MachineInstrBuilder MachineIRBuilder::buildFConstant(const DstOp &Res,
386 LLT DstTy = Res.getLLTTy(*getMRI());
390 return buildFConstant(Res, *CFP);
393 MachineInstrBuilder MachineIRBuilder::buildFConstant(const DstOp &Res,
397 return buildFConstant(Res, *CFP);
401 MachineIRBuilder::buildConstantPtrAuth(const DstOp &Res,
405 Res.addDefToMIB(*getMRI(), MIB);
438 const DstOp &Res,
441 assert(Res.getLLTTy(*getMRI()).isValid() && "invalid operand type");
445 Res.addDefToMIB(*getMRI(), MIB);
495 MachineInstrBuilder MachineIRBuilder::buildAnyExt(const DstOp &Res,
497 return buildInstr(TargetOpcode::G_ANYEXT, Res, Op);
500 MachineInstrBuilder MachineIRBuilder::buildSExt(const DstOp &Res,
502 return buildInstr(TargetOpcode::G_SEXT, Res, Op);
505 MachineInstrBuilder MachineIRBuilder::buildZExt(const DstOp &Res,
508 return buildInstr(TargetOpcode::G_ZEXT, Res, Op, Flags);
523 MachineInstrBuilder MachineIRBuilder::buildBoolExt(const DstOp &Res,
527 return buildInstr(ExtOp, Res, Op);
530 MachineInstrBuilder MachineIRBuilder::buildBoolExtInReg(const DstOp &Res,
537 return buildSExtInReg(Res, Op, 1);
539 return buildZExtInReg(Res, Op, 1);
541 return buildCopy(Res, Op);
548 const DstOp &Res,
553 assert(Res.getLLTTy(*getMRI()).isScalar() ||
554 Res.getLLTTy(*getMRI()).isVector());
555 assert(Res.getLLTTy(*getMRI()).isScalar() ==
559 if (Res.getLLTTy(*getMRI()).getSizeInBits() >
562 else if (Res.getLLTTy(*getMRI()).getSizeInBits() <
566 assert(Res.getLLTTy(*getMRI()) == Op.getLLTTy(*getMRI()));
568 return buildInstr(Opcode, Res, Op);
571 MachineInstrBuilder MachineIRBuilder::buildSExtOrTrunc(const DstOp &Res,
573 return buildExtOrTrunc(TargetOpcode::G_SEXT, Res, Op);
576 MachineInstrBuilder MachineIRBuilder::buildZExtOrTrunc(const DstOp &Res,
578 return buildExtOrTrunc(TargetOpcode::G_ZEXT, Res, Op);
581 MachineInstrBuilder MachineIRBuilder::buildAnyExtOrTrunc(const DstOp &Res,
583 return buildExtOrTrunc(TargetOpcode::G_ANYEXT, Res, Op);
586 MachineInstrBuilder MachineIRBuilder::buildZExtInReg(const DstOp &Res,
589 LLT ResTy = Res.getLLTTy(*getMRI());
592 return buildAnd(Res, Op, Mask);
641 MachineInstrBuilder MachineIRBuilder::buildUndef(const DstOp &Res) {
642 return buildInstr(TargetOpcode::G_IMPLICIT_DEF, {Res}, {});
645 MachineInstrBuilder MachineIRBuilder::buildMergeValues(const DstOp &Res,
652 return buildInstr(TargetOpcode::G_MERGE_VALUES, Res, TmpVec);
656 MachineIRBuilder::buildMergeLikeInstr(const DstOp &Res,
663 return buildInstr(getOpcodeForMerge(Res, TmpVec), Res, TmpVec);
667 MachineIRBuilder::buildMergeLikeInstr(const DstOp &Res,
670 return buildInstr(getOpcodeForMerge(Res, Ops), Res, Ops);
684 MachineInstrBuilder MachineIRBuilder::buildUnmerge(ArrayRef<LLT> Res,
689 SmallVector<DstOp, 8> TmpVec(Res);
694 MachineInstrBuilder MachineIRBuilder::buildUnmerge(LLT Res,
696 unsigned NumReg = Op.getLLTTy(*getMRI()).getSizeInBits() / Res.getSizeInBits();
697 SmallVector<DstOp, 8> TmpVec(NumReg, Res);
710 MachineInstrBuilder MachineIRBuilder::buildUnmerge(ArrayRef<Register> Res,
715 SmallVector<DstOp, 8> TmpVec(Res);
720 MachineInstrBuilder MachineIRBuilder::buildBuildVector(const DstOp &Res,
726 return buildInstr(TargetOpcode::G_BUILD_VECTOR, Res, TmpVec);
730 MachineIRBuilder::buildBuildVectorConstant(const DstOp &Res,
734 LLT EltTy = Res.getLLTTy(*getMRI()).getElementType();
737 return buildInstr(TargetOpcode::G_BUILD_VECTOR, Res, TmpVec);
740 MachineInstrBuilder MachineIRBuilder::buildSplatBuildVector(const DstOp &Res,
742 SmallVector<SrcOp, 8> TmpVec(Res.getLLTTy(*getMRI()).getNumElements(), Src);
743 return buildInstr(TargetOpcode::G_BUILD_VECTOR, Res, TmpVec);
747 MachineIRBuilder::buildBuildVectorTrunc(const DstOp &Res,
754 Res.getLLTTy(*getMRI()).getElementType().getSizeInBits())
755 return buildInstr(TargetOpcode::G_BUILD_VECTOR, Res, TmpVec);
756 return buildInstr(TargetOpcode::G_BUILD_VECTOR_TRUNC, Res, TmpVec);
759 MachineInstrBuilder MachineIRBuilder::buildShuffleSplat(const DstOp &Res,
761 LLT DstTy = Res.getLLTTy(*getMRI());
771 MachineInstrBuilder MachineIRBuilder::buildSplatVector(const DstOp &Res,
773 assert(Src.getLLTTy(*getMRI()) == Res.getLLTTy(*getMRI()).getElementType() &&
775 return buildInstr(TargetOpcode::G_SPLAT_VECTOR, Res, Src);
778 MachineInstrBuilder MachineIRBuilder::buildShuffleVector(const DstOp &Res,
782 LLT DstTy = Res.getLLTTy(*getMRI());
793 return buildInstr(TargetOpcode::G_SHUFFLE_VECTOR, {Res}, {Src1, Src2})
798 MachineIRBuilder::buildConcatVectors(const DstOp &Res, ArrayRef<Register> Ops) {
803 return buildInstr(TargetOpcode::G_CONCAT_VECTORS, Res, TmpVec);
806 MachineInstrBuilder MachineIRBuilder::buildInsert(const DstOp &Res,
811 Res.getLLTTy(*getMRI()).getSizeInBits() &&
814 if (Res.getLLTTy(*getMRI()).getSizeInBits() ==
816 return buildCast(Res, Op);
819 return buildInstr(TargetOpcode::G_INSERT, Res, {Src, Op, uint64_t(Index)});
822 MachineInstrBuilder MachineIRBuilder::buildStepVector(const DstOp &Res,
824 unsigned Bitwidth = Res.getLLTTy(*getMRI()).getElementType().getSizeInBits();
829 Res.addDefToMIB(*getMRI(), StepVector);
834 MachineInstrBuilder MachineIRBuilder::buildVScale(const DstOp &Res,
838 Res.getLLTTy(*getMRI()).getScalarSizeInBits());
840 return buildVScale(Res, *CI);
843 MachineInstrBuilder MachineIRBuilder::buildVScale(const DstOp &Res,
847 Res.addDefToMIB(*getMRI(), VScale);
852 MachineInstrBuilder MachineIRBuilder::buildVScale(const DstOp &Res,
856 return buildVScale(Res, *CI);
909 MachineIRBuilder::buildTrunc(const DstOp &Res, const SrcOp &Op,
911 return buildInstr(TargetOpcode::G_TRUNC, Res, Op, Flags);
915 MachineIRBuilder::buildFPTrunc(const DstOp &Res, const SrcOp &Op,
917 return buildInstr(TargetOpcode::G_FPTRUNC, Res, Op, Flags);
921 const DstOp &Res,
925 return buildInstr(TargetOpcode::G_ICMP, Res, {Pred, Op0, Op1}, Flags);
929 const DstOp &Res,
934 return buildInstr(TargetOpcode::G_FCMP, Res, {Pred, Op0, Op1}, Flags);
937 MachineInstrBuilder MachineIRBuilder::buildSCmp(const DstOp &Res,
940 return buildInstr(TargetOpcode::G_SCMP, Res, {Op0, Op1});
943 MachineInstrBuilder MachineIRBuilder::buildUCmp(const DstOp &Res,
946 return buildInstr(TargetOpcode::G_UCMP, Res, {Op0, Op1});
950 MachineIRBuilder::buildSelect(const DstOp &Res, const SrcOp &Tst,
954 return buildInstr(TargetOpcode::G_SELECT, {Res}, {Tst, Op0, Op1}, Flags);
957 MachineInstrBuilder MachineIRBuilder::buildInsertSubvector(const DstOp &Res,
961 return buildInstr(TargetOpcode::G_INSERT_SUBVECTOR, Res,
965 MachineInstrBuilder MachineIRBuilder::buildExtractSubvector(const DstOp &Res,
968 return buildInstr(TargetOpcode::G_EXTRACT_SUBVECTOR, Res,
973 MachineIRBuilder::buildInsertVectorElement(const DstOp &Res, const SrcOp &Val,
975 return buildInstr(TargetOpcode::G_INSERT_VECTOR_ELT, Res, {Val, Elt, Idx});
979 MachineIRBuilder::buildExtractVectorElement(const DstOp &Res, const SrcOp &Val,
981 return buildInstr(TargetOpcode::G_EXTRACT_VECTOR_ELT, Res, {Val, Idx});
1178 MachineIRBuilder::buildBlockAddress(Register Res, const BlockAddress *BA) {
1180 assert(getMRI()->getType(Res).isPointer() && "invalid res type");
1183 return buildInstr(TargetOpcode::G_BLOCK_ADDR).addDef(Res).addBlockAddress(BA);
1400 "Res type must be a vector");
1418 "Res type must be a vector");