Lines Matching defs:InH

5782   Register InH = MRI.createGenericVirtualRegister(HalfTy);
5783   MIRBuilder.buildUnmerge({InL, InH}, MI.getOperand(1));
5786     MIRBuilder.buildMergeLikeInstr(MI.getOperand(0), {InL, InH});
5809           MIRBuilder.buildShl(NVT, InH, MIRBuilder.buildConstant(AmtTy, Amt));
5818       Lo = MIRBuilder.buildLShr(NVT, InH,
5822       Lo = InH;
5829           NVT, InH, MIRBuilder.buildConstant(AmtTy, -Amt + NVTBits));
5832       Hi = MIRBuilder.buildLShr(NVT, InH, ShiftAmtConst);
5837           NVT, InH, MIRBuilder.buildConstant(AmtTy, NVTBits - 1));
5839       Lo = MIRBuilder.buildAShr(NVT, InH,
5841       Hi = MIRBuilder.buildAShr(NVT, InH,
5844       Lo = InH;
5845       Hi = MIRBuilder.buildAShr(NVT, InH,
5852           NVT, InH, MIRBuilder.buildConstant(AmtTy, -Amt + NVTBits));
5855       Hi = MIRBuilder.buildAShr(NVT, InH, ShiftAmtConst);
5905   Register InH = MRI.createGenericVirtualRegister(HalfTy);
5906   MIRBuilder.buildUnmerge({InL, InH}, MI.getOperand(1));
5922     auto HiOr = MIRBuilder.buildShl(HalfTy, InH, Amt);
5931         HalfTy, IsZero, InH, MIRBuilder.buildSelect(HalfTy, IsShort, HiS, HiL));
5940     auto HiS = MIRBuilder.buildInstr(MI.getOpcode(), {HalfTy}, {InH, Amt});
5943     auto HiOr = MIRBuilder.buildShl(HalfTy, InH, AmtLack);
5952       HiL = MIRBuilder.buildAShr(HalfTy, InH, ShiftAmt);    // Sign of Hi part.
5955                                      {InH, AmtExcess});     // Lo from Hi part.