Lines Matching defs:HalfTy

5779                                              const LLT HalfTy, const LLT AmtTy) {
5781   Register InL = MRI.createGenericVirtualRegister(HalfTy);
5782   Register InH = MRI.createGenericVirtualRegister(HalfTy);
5791   LLT NVT = HalfTy;
5792   unsigned NVTBits = HalfTy.getSizeInBits();
5891   const LLT HalfTy = LLT::scalar(NewBitSize);
5895     return narrowScalarShiftByConstant(MI, VRegAndVal->Value, HalfTy,
5904   Register InL = MRI.createGenericVirtualRegister(HalfTy);
5905   Register InH = MRI.createGenericVirtualRegister(HalfTy);
5919     auto LoS = MIRBuilder.buildShl(HalfTy, InL, Amt);
5921     auto LoOr = MIRBuilder.buildLShr(HalfTy, InL, AmtLack);
5922     auto HiOr = MIRBuilder.buildShl(HalfTy, InH, Amt);
5923     auto HiS = MIRBuilder.buildOr(HalfTy, LoOr, HiOr);
5926     auto LoL = MIRBuilder.buildConstant(HalfTy, 0);         // Lo part is zero.
5927     auto HiL = MIRBuilder.buildShl(HalfTy, InL, AmtExcess); // Hi from Lo part.
5929     auto Lo = MIRBuilder.buildSelect(HalfTy, IsShort, LoS, LoL);
5931         HalfTy, IsZero, InH, MIRBuilder.buildSelect(HalfTy, IsShort, HiS, HiL));
5940     auto HiS = MIRBuilder.buildInstr(MI.getOpcode(), {HalfTy}, {InH, Amt});
5942     auto LoOr = MIRBuilder.buildLShr(HalfTy, InL, Amt);
5943     auto HiOr = MIRBuilder.buildShl(HalfTy, InH, AmtLack);
5944     auto LoS = MIRBuilder.buildOr(HalfTy, LoOr, HiOr);
5949       HiL = MIRBuilder.buildConstant(HalfTy, 0);            // Hi part is zero.
5952       HiL = MIRBuilder.buildAShr(HalfTy, InH, ShiftAmt);    // Sign of Hi part.
5954     auto LoL = MIRBuilder.buildInstr(MI.getOpcode(), {HalfTy},
5958         HalfTy, IsZero, InL, MIRBuilder.buildSelect(HalfTy, IsShort, LoS, LoL));
5960     auto Hi = MIRBuilder.buildSelect(HalfTy, IsShort, HiS, HiL);