Lines Matching defs:CarryIn

2415   std::optional<Register> CarryIn;
2438     CarryIn = MI.getOperand(4).getReg();
2443     CarryIn = MI.getOperand(4).getReg();
2448     CarryIn = MI.getOperand(4).getReg();
2453     CarryIn = MI.getOperand(4).getReg();
2461     if (CarryIn)
2473   if (CarryIn) {
2477                             {LHSExt, RHSExt, *CarryIn})
4490     auto [Res, CarryOut, LHS, RHS, CarryIn] = MI.getFirst5Regs();
4503     auto ZExtCarryIn = MIRBuilder.buildZExt(Ty, CarryIn);
4511     auto Carry2 = MIRBuilder.buildAnd(CondTy, ResEqZero, CarryIn);
6504   Register CarryDst, CarryIn;
6508     CarryIn = MI.getOperand(NumDefs + 2).getReg();
6533     if (!CarryIn) {
6538                             {Src1Regs[i], Src2Regs[i], CarryIn});
6541                             {Src1Regs[i], Src2Regs[i], CarryIn});
6545     CarryIn = CarryOut;