Lines Matching defs:VRegs

213   auto *VRegs = VMap.getVRegs(Val);
226       VRegs->push_back(MRI->createGenericVirtualRegister(Ty));
227     return *VRegs;
236       llvm::copy(EltRegs, std::back_inserter(*VRegs));
240     VRegs->push_back(MRI->createGenericVirtualRegister(SplitTys[0]));
241     bool Success = translate(cast<Constant>(Val), VRegs->front());
248       return *VRegs;
252   return *VRegs;
382   ArrayRef<Register> VRegs;
384     VRegs = getOrCreateVRegs(*Ret);
395   return CLI->lowerReturn(MIRBuilder, Ret, VRegs, FuncInfo, SwiftErrorVReg);
2038   SmallVector<llvm::SrcOp, 4> VRegs;
2040     VRegs.push_back(getOrCreateVReg(*Arg));
2042   MIRBuilder.buildInstr(Op, {getOrCreateVReg(CI)}, VRegs,
2083   SmallVector<llvm::SrcOp, 4> VRegs;
2085     VRegs.push_back(getOrCreateVReg(*FPI.getArgOperand(I)));
2087   MIRBuilder.buildInstr(Opcode, {getOrCreateVReg(FPI)}, VRegs, Flags);
2092   auto VRegs = getOrCreateVRegs(Arg);
2093   if (VRegs.size() != 1)
2097   auto *VRegDef = MF->getRegInfo().getVRegDef(VRegs[0]);
2214     SmallVector<llvm::SrcOp, 4> VRegs;
2217         VRegs.push_back(VReg);
2218     MIRBuilder.buildInstr(TargetOpcode::FAKE_USE, {}, VRegs);
2355     ArrayRef<Register> VRegs = getOrCreateVRegs(CI);
2356     MIRBuilder.buildFFrexp(VRegs[0], VRegs[1],
2362     ArrayRef<Register> VRegs = getOrCreateVRegs(CI);
2363     MIRBuilder.buildFSincos(VRegs[0], VRegs[1],
2835       ArrayRef<Register> VRegs = getOrCreateVRegs(*Arg.value());
2836       if (VRegs.size() > 1)
2838       MIB.addUse(VRegs[0]);
4101     ArrayRef<Register> VRegs = getOrCreateVRegs(Arg);
4102     VRegArgs.push_back(VRegs);
4105       assert(VRegs.size() == 1 && "Too many vregs for Swift error");
4106       SwiftError.setCurrentVReg(EntryBB, SwiftError.getFunctionArg(), VRegs[0]);