Lines Matching defs:Part

3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
712     for (unsigned Part = 0; Part < NumParts; ++Part) {
714       if (Part == 0) {
718         if (Part == NumParts - 1)
724                              Args[i].Flags[Part], CCInfo)) {
813         for (unsigned Part = 0; Part < NumParts; ++Part)
814           Args[i].Regs[Part] = MRI.createGenericVirtualRegister(NewLLT);
831     for (unsigned Part = 0; Part < NumParts; ++Part) {
832       assert((VA.getLocInfo() != CCValAssign::Indirect || Part == 0) &&
835       Register ArgReg = Args[i].Regs[Part];
837       unsigned Idx = BigEndianPartOrdering ? NumParts - 1 - Part : Part;
839       const ISD::ArgFlagsTy Flags = Args[i].Flags[Part];
866         MIRBuilder.buildStore(Args[i].OrigRegs[Part], PointerToStackReg,
896           Handler.assignValueToAddress(Args[i], Part, StackAddr, MemTy, MPO,
939         Handler.assignValueToReg(ArgReg, ThisReturnRegs[Part], VA);