Lines Matching defs:OrigRegs
369 /// typed values to the original IR value. \p OrigRegs contains the destination
372 static void buildCopyFromRegs(MachineIRBuilder &B, ArrayRef<Register> OrigRegs,
380 assert(OrigRegs[0] == Regs[0]);
384 if (PartLLT.getSizeInBits() == LLTy.getSizeInBits() && OrigRegs.size() == 1 &&
386 B.buildBitcast(OrigRegs[0], Regs[0]);
396 OrigRegs.size() == 1 && Regs.size() == 1) {
410 LLT OrigTy = MRI.getType(OrigRegs[0]);
413 B.buildIntToPtr(OrigRegs[0], B.buildTrunc(IntPtrTy, SrcReg));
417 B.buildTrunc(OrigRegs[0], SrcReg);
422 assert(OrigRegs.size() == 1);
423 LLT OrigTy = MRI.getType(OrigRegs[0]);
427 B.buildMergeValues(OrigRegs[0], Regs);
430 B.buildTrunc(OrigRegs[0], Widened);
437 assert(OrigRegs.size() == 1);
454 mergeVectorRegsToResultRegs(B, OrigRegs, CastRegs);
464 mergeVectorRegsToResultRegs(B, OrigRegs, CastRegs);
476 LLT RealDstEltTy = MRI.getType(OrigRegs[0]).getElementType();
488 B.buildBuildVector(OrigRegs[0], Regs);
508 B.buildBuildVector(OrigRegs[0], EltMerges);
524 LLT OriginalEltTy = MRI.getType(OrigRegs[0]).getElementType();
548 B.buildTrunc(OrigRegs[0], BuildVec);
797 Args[i].OrigRegs.assign(Args[i].Regs.begin(), Args[i].Regs.end());
824 assert(Args[i].OrigRegs.size() == 1);
825 buildCopyToRegs(MIRBuilder, Args[i].Regs, Args[i].OrigRegs[0], OrigTy,
866 MIRBuilder.buildStore(Args[i].OrigRegs[Part], PointerToStackReg,
960 MIRBuilder.buildLoad(Args[i].OrigRegs[0], Args[i].Regs[0], MPO,
977 buildCopyFromRegs(MIRBuilder, Args[i].OrigRegs, Args[i].Regs, OrigTy,