Lines Matching refs:scheduling

15 available in LLVM (e.g. scheduling models) to statically measure the performance
20 there is a scheduling model available in LLVM.
52 inevitably affected by the quality of the scheduling models in LLVM.
107  defaults to field 'IssueWidth' in the processor scheduling model.  If width is
240   not parse or lack key scheduling information. Note that the resulting analysis
377 instructions to use the scheduling behaviour of its pseudo-instruction
938 of the ``IssueWidth`` in LLVM's scheduling model.
956 number of micro-opcodes specified for that instruction by the target scheduling
960 `MicroOpBufferSize` in the target scheduling model.
963 entries. :program:`llvm-mca` queries the scheduling model to determine the set
974 scheduling model.
1056 loads, the scheduling model provides an "optimistic" load-to-use latency (which
1092 the ``IssueWidth`` parameter in LLVM's scheduling model.
1102 scheduling model, :program:`llvm-mca` isn't always able to simulate them
1103 perfectly. Modifying the scheduling model isn't always a viable
1131 On certain architectures, scheduling information for certain instructions
1133 schedule class. For example, data that can have an impact on scheduling can
1137 and `vl` change the scheduling behaviour of vector instructions. Since MCA
1148 LMUL to the scheduling class of the pseudo-instruction that describes