Lines Matching full:signed

2 …nt -triple x86_64-unknown-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED
17 signed char c;
38 // SIGNED-LABEL: @add_auf(
39 // SIGNED-NEXT:  entry:
40 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, ptr @uf, align 2
41 // SIGNED-NEXT:    [[TMP1:%.*]] = load i32, ptr @a, align 4
42 // SIGNED-NEXT:    [[RESIZE:%.*]] = sext i32 [[TMP1]] to i33
43 // SIGNED-NEXT:    [[UPSCALE:%.*]] = shl i33 [[RESIZE]], 1
44 // SIGNED-NEXT:    [[RESIZE1:%.*]] = zext i16 [[TMP0]] to i33
45 // SIGNED-NEXT:    [[TMP2:%.*]] = add i33 [[UPSCALE]], [[RESIZE1]]
46 // SIGNED-NEXT:    [[DOWNSCALE:%.*]] = ashr i33 [[TMP2]], 1
47 // SIGNED-NEXT:    [[RESIZE2:%.*]] = trunc i33 [[DOWNSCALE]] to i32
48 // SIGNED-NEXT:    store i32 [[RESIZE2]], ptr @a, align 4
49 // SIGNED-NEXT:    ret void
80 // SIGNED-LABEL: @add_ulashf(
81 // SIGNED-NEXT:  entry:
82 // SIGNED-NEXT:    [[TMP0:%.*]] = load i8, ptr @shf, align 1
83 // SIGNED-NEXT:    [[TMP1:%.*]] = load i64, ptr @ula, align 8
84 // SIGNED-NEXT:    [[RESIZE:%.*]] = zext i64 [[TMP1]] to i65
85 // SIGNED-NEXT:    [[RESIZE1:%.*]] = sext i8 [[TMP0]] to i65
86 // SIGNED-NEXT:    [[UPSCALE:%.*]] = shl i65 [[RESIZE1]], 25
87 // SIGNED-NEXT:    [[TMP2:%.*]] = add i65 [[RESIZE]], [[UPSCALE]]
88 // SIGNED-NEXT:    [[DOWNSCALE:%.*]] = ashr i65 [[TMP2]], 1
89 // SIGNED-NEXT:    [[RESIZE2:%.*]] = trunc i65 [[DOWNSCALE]] to i64
90 // SIGNED-NEXT:    [[UPSCALE3:%.*]] = shl i64 [[RESIZE2]], 1
91 // SIGNED-NEXT:    store i64 [[UPSCALE3]], ptr @ula, align 8
92 // SIGNED-NEXT:    ret void
108 // SIGNED-LABEL: @add_ufshf(
109 // SIGNED-NEXT:  entry:
110 // SIGNED-NEXT:    [[TMP0:%.*]] = load i8, ptr @shf, align 1
111 // SIGNED-NEXT:    [[TMP1:%.*]] = load i16, ptr @uf, align 2
112 // SIGNED-NEXT:    [[RESIZE:%.*]] = zext i16 [[TMP1]] to i17
113 // SIGNED-NEXT:    [[RESIZE1:%.*]] = sext i8 [[TMP0]] to i17
114 // SIGNED-NEXT:    [[UPSCALE:%.*]] = shl i17 [[RESIZE1]], 9
115 // SIGNED-NEXT:    [[TMP2:%.*]] = add i17 [[RESIZE]], [[UPSCALE]]
116 // SIGNED-NEXT:    [[DOWNSCALE:%.*]] = ashr i17 [[TMP2]], 1
117 // SIGNED-NEXT:    [[RESIZE2:%.*]] = trunc i17 [[DOWNSCALE]] to i16
118 // SIGNED-NEXT:    [[UPSCALE3:%.*]] = shl i16 [[RESIZE2]], 1
119 // SIGNED-NEXT:    store i16 [[UPSCALE3]], ptr @uf, align 2
120 // SIGNED-NEXT:    ret void
182 // SIGNED-LABEL: @add_ulai(
183 // SIGNED-NEXT:  entry:
184 // SIGNED-NEXT:    [[TMP0:%.*]] = load i32, ptr @i, align 4
185 // SIGNED-NEXT:    [[TMP1:%.*]] = load i64, ptr @ula, align 8
186 // SIGNED-NEXT:    [[RESIZE:%.*]] = zext i64 [[TMP1]] to i65
187 // SIGNED-NEXT:    [[RESIZE1:%.*]] = sext i32 [[TMP0]] to i65
188 // SIGNED-NEXT:    [[UPSCALE:%.*]] = shl i65 [[RESIZE1]], 32
189 // SIGNED-NEXT:    [[TMP2:%.*]] = add i65 [[RESIZE]], [[UPSCALE]]
190 // SIGNED-NEXT:    [[RESIZE2:%.*]] = trunc i65 [[TMP2]] to i64
191 // SIGNED-NEXT:    store i64 [[RESIZE2]], ptr @ula, align 8
192 // SIGNED-NEXT:    ret void
208 // SIGNED-LABEL: @add_iula(
209 // SIGNED-NEXT:  entry:
210 // SIGNED-NEXT:    [[TMP0:%.*]] = load i64, ptr @ula, align 8
211 // SIGNED-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
212 // SIGNED-NEXT:    [[RESIZE:%.*]] = sext i32 [[TMP1]] to i65
213 // SIGNED-NEXT:    [[UPSCALE:%.*]] = shl i65 [[RESIZE]], 32
214 // SIGNED-NEXT:    [[RESIZE1:%.*]] = zext i64 [[TMP0]] to i65
215 // SIGNED-NEXT:    [[TMP2:%.*]] = add i65 [[UPSCALE]], [[RESIZE1]]
216 // SIGNED-NEXT:    [[RESIZE2:%.*]] = trunc i65 [[TMP2]] to i64
217 // SIGNED-NEXT:    [[DOWNSCALE:%.*]] = lshr i64 [[RESIZE2]], 32
218 // SIGNED-NEXT:    [[RESIZE3:%.*]] = trunc i64 [[DOWNSCALE]] to i32
219 // SIGNED-NEXT:    store i32 [[RESIZE3]], ptr @i, align 4
220 // SIGNED-NEXT:    ret void
306 // SIGNED-LABEL: @add_sulau(
307 // SIGNED-NEXT:  entry:
308 // SIGNED-NEXT:    [[TMP0:%.*]] = load i32, ptr @u, align 4
309 // SIGNED-NEXT:    [[TMP1:%.*]] = load i64, ptr @sula, align 8
310 // SIGNED-NEXT:    [[RESIZE:%.*]] = zext i32 [[TMP0]] to i64
311 // SIGNED-NEXT:    [[UPSCALE:%.*]] = shl i64 [[RESIZE]], 32
312 // SIGNED-NEXT:    [[TMP2:%.*]] = call i64 @llvm.uadd.sat.i64(i64 [[TMP1]], i64 [[UPSCALE]])
313 // SIGNED-NEXT:    store i64 [[TMP2]], ptr @sula, align 8
314 // SIGNED-NEXT:    ret void
332 // SIGNED-LABEL: @add_sshsuf(
333 // SIGNED-NEXT:  entry:
334 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, ptr @suf, align 2
335 // SIGNED-NEXT:    [[TMP1:%.*]] = load i8, ptr @sshf, align 1
336 // SIGNED-NEXT:    [[RESIZE:%.*]] = sext i8 [[TMP1]] to i17
337 // SIGNED-NEXT:    [[UPSCALE:%.*]] = shl i17 [[RESIZE]], 9
338 // SIGNED-NEXT:    [[RESIZE1:%.*]] = zext i16 [[TMP0]] to i17
339 // SIGNED-NEXT:    [[TMP2:%.*]] = call i17 @llvm.sadd.sat.i17(i17 [[UPSCALE]], i17 [[RESIZE1]])
340 // SIGNED-NEXT:    [[DOWNSCALE:%.*]] = ashr i17 [[TMP2]], 1
341 // SIGNED-NEXT:    [[RESIZE2:%.*]] = trunc i17 [[DOWNSCALE]] to i16
342 // SIGNED-NEXT:    [[DOWNSCALE3:%.*]] = ashr i16 [[RESIZE2]], 8
343 // SIGNED-NEXT:    [[RESIZE4:%.*]] = trunc i16 [[DOWNSCALE3]] to i8
344 // SIGNED-NEXT:    store i8 [[RESIZE4]], ptr @sshf, align 1
345 // SIGNED-NEXT:    ret void
426 // SIGNED-LABEL: @sub_auf(
427 // SIGNED-NEXT:  entry:
428 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, ptr @uf, align 2
429 // SIGNED-NEXT:    [[TMP1:%.*]] = load i32, ptr @a, align 4
430 // SIGNED-NEXT:    [[RESIZE:%.*]] = sext i32 [[TMP1]] to i33
431 // SIGNED-NEXT:    [[UPSCALE:%.*]] = shl i33 [[RESIZE]], 1
432 // SIGNED-NEXT:    [[RESIZE1:%.*]] = zext i16 [[TMP0]] to i33
433 // SIGNED-NEXT:    [[TMP2:%.*]] = sub i33 [[UPSCALE]], [[RESIZE1]]
434 // SIGNED-NEXT:    [[DOWNSCALE:%.*]] = ashr i33 [[TMP2]], 1
435 // SIGNED-NEXT:    [[RESIZE2:%.*]] = trunc i33 [[DOWNSCALE]] to i32
436 // SIGNED-NEXT:    store i32 [[RESIZE2]], ptr @a, align 4
437 // SIGNED-NEXT:    ret void
511 // SIGNED-LABEL: @mul_auf(
512 // SIGNED-NEXT:  entry:
513 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, ptr @uf, align 2
514 // SIGNED-NEXT:    [[TMP1:%.*]] = load i32, ptr @a, align 4
515 // SIGNED-NEXT:    [[RESIZE:%.*]] = sext i32 [[TMP1]] to i33
516 // SIGNED-NEXT:    [[UPSCALE:%.*]] = shl i33 [[RESIZE]], 1
517 // SIGNED-NEXT:    [[RESIZE1:%.*]] = zext i16 [[TMP0]] to i33
518 // SIGNED-NEXT:    [[TMP2:%.*]] = call i33 @llvm.smul.fix.i33(i33 [[UPSCALE]], i33 [[RESIZE1]], i32…
519 // SIGNED-NEXT:    [[DOWNSCALE:%.*]] = ashr i33 [[TMP2]], 1
520 // SIGNED-NEXT:    [[RESIZE2:%.*]] = trunc i33 [[DOWNSCALE]] to i32
521 // SIGNED-NEXT:    store i32 [[RESIZE2]], ptr @a, align 4
522 // SIGNED-NEXT:    ret void
596 // SIGNED-LABEL: @div_auf(
597 // SIGNED-NEXT:  entry:
598 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, ptr @uf, align 2
599 // SIGNED-NEXT:    [[TMP1:%.*]] = load i32, ptr @a, align 4
600 // SIGNED-NEXT:    [[RESIZE:%.*]] = sext i32 [[TMP1]] to i33
601 // SIGNED-NEXT:    [[UPSCALE:%.*]] = shl i33 [[RESIZE]], 1
602 // SIGNED-NEXT:    [[RESIZE1:%.*]] = zext i16 [[TMP0]] to i33
603 // SIGNED-NEXT:    [[TMP2:%.*]] = call i33 @llvm.sdiv.fix.i33(i33 [[UPSCALE]], i33 [[RESIZE1]], i32…
604 // SIGNED-NEXT:    [[DOWNSCALE:%.*]] = ashr i33 [[TMP2]], 1
605 // SIGNED-NEXT:    [[RESIZE2:%.*]] = trunc i33 [[DOWNSCALE]] to i32
606 // SIGNED-NEXT:    store i32 [[RESIZE2]], ptr @a, align 4
607 // SIGNED-NEXT:    ret void
693 // SIGNED-LABEL: @shft_sufi(
694 // SIGNED-NEXT:  entry:
695 // SIGNED-NEXT:    [[TMP0:%.*]] = load i32, ptr @i, align 4
696 // SIGNED-NEXT:    [[TMP1:%.*]] = load i16, ptr @suf, align 2
697 // SIGNED-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP0]] to i16
698 // SIGNED-NEXT:    [[TMP3:%.*]] = call i16 @llvm.ushl.sat.i16(i16 [[TMP1]], i16 [[TMP2]])
699 // SIGNED-NEXT:    store i16 [[TMP3]], ptr @suf, align 2
700 // SIGNED-NEXT:    ret void