Lines Matching full:signed

2 …nt -triple x86_64-unknown-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED
118 // SIGNED-LABEL: @sadd_sasausa(
119 // SIGNED-NEXT: entry:
120 // SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2
121 // SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2
122 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i17
123 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i17 [[RESIZE]], 1
124 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i17
125 // SIGNED-NEXT: [[TMP2:%.*]] = add i17 [[UPSCALE]], [[RESIZE1]]
126 // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i17 [[TMP2]], 1
127 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i17 [[DOWNSCALE]] to i16
128 // SIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2
129 // SIGNED-NEXT: ret void
143 // SIGNED-LABEL: @sadd_asaua(
144 // SIGNED-NEXT: entry:
145 // SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2
146 // SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ua, align 4
147 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i33
148 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i33 [[RESIZE]], 9
149 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i33
150 // SIGNED-NEXT: [[TMP2:%.*]] = add i33 [[UPSCALE]], [[RESIZE1]]
151 // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i33 [[TMP2]], 1
152 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i33 [[DOWNSCALE]] to i32
153 // SIGNED-NEXT: store i32 [[RESIZE2]], ptr @a, align 4
154 // SIGNED-NEXT: ret void
170 // SIGNED-LABEL: @sadd_sasausf(
171 // SIGNED-NEXT: entry:
172 // SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2
173 // SIGNED-NEXT: [[TMP1:%.*]] = load i8, ptr @usf, align 1
174 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i17
175 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i17 [[RESIZE]], 1
176 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i8 [[TMP1]] to i17
177 // SIGNED-NEXT: [[TMP2:%.*]] = add i17 [[UPSCALE]], [[RESIZE1]]
178 // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i17 [[TMP2]], 1
179 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i17 [[DOWNSCALE]] to i16
180 // SIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2
181 // SIGNED-NEXT: ret void
196 // SIGNED-LABEL: @sadd_sasaulf(
197 // SIGNED-NEXT: entry:
198 // SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2
199 // SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ulf, align 4
200 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i41
201 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i41 [[RESIZE]], 25
202 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i41
203 // SIGNED-NEXT: [[TMP2:%.*]] = add i41 [[UPSCALE]], [[RESIZE1]]
204 // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i41 [[TMP2]], 25
205 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i41 [[DOWNSCALE]] to i16
206 // SIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2
207 // SIGNED-NEXT: ret void
332 // SIGNED-LABEL: @int_usausai(
333 // SIGNED-NEXT: entry:
334 // SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2
335 // SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4
336 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i40
337 // SIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i40
338 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 8
339 // SIGNED-NEXT: [[TMP2:%.*]] = add i40 [[RESIZE]], [[UPSCALE]]
340 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16
341 // SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2
342 // SIGNED-NEXT: ret void
360 // SIGNED-LABEL: @int_usausaui(
361 // SIGNED-NEXT: entry:
362 // SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2
363 // SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4
364 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i40
365 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i40
366 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 8
367 // SIGNED-NEXT: [[TMP2:%.*]] = add i40 [[RESIZE]], [[UPSCALE]]
368 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16
369 // SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2
370 // SIGNED-NEXT: ret void
435 // SIGNED-LABEL: @sat_usasusausas(
436 // SIGNED-NEXT: entry:
437 // SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2
438 // SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa_sat, align 2
439 // SIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[TMP0]], i16 [[TMP1]])
440 // SIGNED-NEXT: store i16 [[TMP2]], ptr @usa_sat, align 2
441 // SIGNED-NEXT: ret void
457 // SIGNED-LABEL: @sat_uasuausas(
458 // SIGNED-NEXT: entry:
459 // SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4
460 // SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa_sat, align 2
461 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP1]] to i32
462 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8
463 // SIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[TMP0]], i32 [[UPSCALE]])
464 // SIGNED-NEXT: store i32 [[TMP2]], ptr @ua_sat, align 4
465 // SIGNED-NEXT: ret void
523 // SIGNED-LABEL: @sat_ufsufsufs(
524 // SIGNED-NEXT: entry:
525 // SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf_sat, align 2
526 // SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @uf_sat, align 2
527 // SIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[TMP0]], i16 [[TMP1]])
528 // SIGNED-NEXT: store i16 [[TMP2]], ptr @uf_sat, align 2
529 // SIGNED-NEXT: ret void
545 // SIGNED-LABEL: @sat_usasusasi(
546 // SIGNED-NEXT: entry:
547 // SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa_sat, align 2
548 // SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4
549 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i40
550 // SIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i40
551 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 8
552 // SIGNED-NEXT: [[TMP2:%.*]] = call i40 @llvm.sadd.sat.i40(i40 [[RESIZE]], i40 [[UPSCALE]])
553 // SIGNED-NEXT: [[TMP3:%.*]] = icmp sgt i40 [[TMP2]], 65535
554 // SIGNED-NEXT: [[SATMAX:%.*]] = select i1 [[TMP3]], i40 65535, i40 [[TMP2]]
555 // SIGNED-NEXT: [[TMP4:%.*]] = icmp slt i40 [[SATMAX]], 0
556 // SIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i40 0, i40 [[SATMAX]]
557 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[SATMIN]] to i16
558 // SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa_sat, align 2
559 // SIGNED-NEXT: ret void