Lines Matching full:layout
2 // RUN: -emit-llvm -o %t %s | FileCheck -check-prefixes=LAYOUT,LAYOUT-X86-64 %s
5 // RUN: -emit-llvm -o %t %s | FileCheck -check-prefixes=LAYOUT,LAYOUT-PPC64 %s
12 // Test basic bitfield layout access across interesting byte and word
24 // LAYOUT-LABEL: LLVMType:%"struct.N0::S" =
25 // LAYOUT-SAME: type { i64 }
26 // LAYOUT: BitFields:[
27 // LAYOUT-X86-64-NEXT: <CGBitFieldInfo Offset:0 Size:14 IsSigned:0 StorageSize:64 StorageOffset:0
28 // LAYOUT-X86-64-NEXT: <CGBitFieldInfo Offset:14 Size:2 IsSigned:0 StorageSize:64 StorageOffset:0
29 // LAYOUT-X86-64-NEXT: <CGBitFieldInfo Offset:16 Size:6 IsSigned:0 StorageSize:64 StorageOffset:0
30 // LAYOUT-X86-64-NEXT: <CGBitFieldInfo Offset:22 Size:2 IsSigned:0 StorageSize:64 StorageOffset:0
31 // LAYOUT-X86-64-NEXT: <CGBitFieldInfo Offset:24 Size:30 IsSigned:0 StorageSize:64 StorageOffset:0
32 // LAYOUT-X86-64-NEXT: <CGBitFieldInfo Offset:54 Size:2 IsSigned:0 StorageSize:64 StorageOffset:0
33 // LAYOUT-X86-64-NEXT: <CGBitFieldInfo Offset:56 Size:6 IsSigned:0 StorageSize:64 StorageOffset:0
34 // LAYOUT-X86-64-NEXT: <CGBitFieldInfo Offset:62 Size:2 IsSigned:0 StorageSize:64 StorageOffset:0
35 // LAYOUT-PPC64-NEXT: <CGBitFieldInfo Offset:50 Size:14 IsSigned:0 StorageSize:64 StorageOffset:0
36 // LAYOUT-PPC64-NEXT: <CGBitFieldInfo Offset:48 Size:2 IsSigned:0 StorageSize:64 StorageOffset:0
37 // LAYOUT-PPC64-NEXT: <CGBitFieldInfo Offset:42 Size:6 IsSigned:0 StorageSize:64 StorageOffset:0
38 // LAYOUT-PPC64-NEXT: <CGBitFieldInfo Offset:40 Size:2 IsSigned:0 StorageSize:64 StorageOffset:0
39 // LAYOUT-PPC64-NEXT: <CGBitFieldInfo Offset:10 Size:30 IsSigned:0 StorageSize:64 StorageOffset:0
40 // LAYOUT-PPC64-NEXT: <CGBitFieldInfo Offset:8 Size:2 IsSigned:0 StorageSize:64 StorageOffset:0
41 // LAYOUT-PPC64-NEXT: <CGBitFieldInfo Offset:2 Size:6 IsSigned:0 StorageSize:64 StorageOffset:0
42 // LAYOUT-PPC64-NEXT: <CGBitFieldInfo Offset:0 Size:2 IsSigned:0 StorageSize:64 StorageOffset:0
43 // LAYOUT-NEXT: ]>
175 // LAYOUT-LABEL: LLVMType:%"struct.N1::S" =
176 // LAYOUT-SAME: type { i8, i8, i8, i8 }
177 // LAYOUT: BitFields:[
178 // LAYOUT-X86-64-NEXT: <CGBitFieldInfo Offset:0 Size:1 IsSigned:0 StorageSize:8 StorageOffset:1
179 // LAYOUT-PPC64-NEXT: <CGBitFieldInfo Offset:7 Size:1 IsSigned:0 StorageSize:8 StorageOffset:1
180 // LAYOUT-NEXT: ]>
226 // LAYOUT-LABEL: LLVMType:%"struct.N2::S" =
227 // LAYOUT-SAME: type { i32, ptr }
228 // LAYOUT: BitFields:[
229 // LAYOUT-X86-64-NEXT: <CGBitFieldInfo Offset:0 Size:24 IsSigned:0 StorageSize:32 StorageOffset:0
230 // LAYOUT-PPC64-NEXT: <CGBitFieldInfo Offset:8 Size:24 IsSigned:0 StorageSize:32 StorageOffset:0
231 // LAYOUT-NEXT: ]>
270 // LAYOUT-LABEL: LLVMType:%"struct.N3::S" =
271 // LAYOUT-SAME: type { i32 }
272 // LAYOUT: BitFields:[
273 // LAYOUT-X86-64-NEXT: <CGBitFieldInfo Offset:0 Size:24 IsSigned:0 StorageSize:32 StorageOffset:0
274 // LAYOUT-PPC64-NEXT: <CGBitFieldInfo Offset:8 Size:24 IsSigned:0 StorageSize:32 StorageOffset:0
275 // LAYOUT-NEXT: ]>
323 // LAYOUT-LABEL: LLVMType:%"struct.N4::Base" =
324 // LAYOUT-SAME: type <{ ptr, [3 x i8], [5 x i8] }>
325 // LAYOUT-NEXT: NonVirtualBaseLLVMType:%"struct.N4::Base.base" = type <{ ptr, [3 x i8] }>
326 // LAYOUT: BitFields:[
327 // LAYOUT-X86-64-NEXT: <CGBitFieldInfo Offset:0 Size:24 IsSigned:0 StorageSize:24 StorageOffset:8
328 // LAYOUT-PPC64-NEXT: <CGBitFieldInfo Offset:0 Size:24 IsSigned:0 StorageSize:24 StorageOffset:8
329 // LAYOUT-NEXT: ]>
372 // LAYOUT-LABEL: LLVMType:%"struct.N5::U::X" =
373 // LAYOUT-SAME: type { [3 x i8], i8 }
374 // LAYOUT-NEXT: NonVirtualBaseLLVMType:%"struct.N5::U::X" =
375 // LAYOUT: BitFields:[
376 // LAYOUT-X86-64-NEXT: <CGBitFieldInfo Offset:0 Size:24 IsSigned:0 StorageSize:24 StorageOffset:0
377 // LAYOUT-PPC64-NEXT: <CGBitFieldInfo Offset:0 Size:24 IsSigned:0 StorageSize:24 StorageOffset:0
378 // LAYOUT-NEXT: ]>
380 // LAYOUT-LABEL: LLVMType:%"struct.N5::U::Y" =
381 // LAYOUT-SAME: type { i32 }
382 // LAYOUT-NEXT: NonVirtualBaseLLVMType:%"struct.N5::U::Y" =
383 // LAYOUT: BitFields:[
384 // LAYOUT-X86-64-NEXT: <CGBitFieldInfo Offset:0 Size:24 IsSigned:0 StorageSize:32 StorageOffset:0
385 // LAYOUT-PPC64-NEXT: <CGBitFieldInfo Offset:8 Size:24 IsSigned:0 StorageSize:32 StorageOffset:0
386 // LAYOUT-NEXT: ]>
431 // LAYOUT-LABEL: LLVMType:%"struct.N6::S" =
432 // LAYOUT-SAME: type { [3 x i8], i8 }
433 // LAYOUT: BitFields:[
434 // LAYOUT-X86-64-NEXT: <CGBitFieldInfo Offset:0 Size:24 IsSigned:0 StorageSize:24 StorageOffset:0
435 // LAYOUT-X86-64-NEXT: <CGBitFieldInfo Offset:0 Size:8 IsSigned:0 StorageSize:8 StorageOffset:3
436 // LAYOUT-PPC64-NEXT: <CGBitFieldInfo Offset:0 Size:24 IsSigned:0 StorageSize:24 StorageOffset:0
437 // LAYOUT-PPC64-NEXT: <CGBitFieldInfo Offset:0 Size:8 IsSigned:0 StorageSize:8 StorageOffset:3
438 // LAYOUT-NEXT: ]>
496 // LAYOUT-LABEL: LLVMType:%"struct.N7::B1" =
497 // LAYOUT-SAME: type <{ ptr, [3 x i8], [5 x i8] }>
498 // LAYOUT-NEXT: NonVirtualBaseLLVMType:%"struct.N7::B1.base" = type <{ ptr, [3 x i8] }>
499 // LAYOUT: BitFields:[
500 // LAYOUT-X86-64-NEXT: <CGBitFieldInfo Offset:0 Size:24 IsSigned:0 StorageSize:24 StorageOffset:8
501 // LAYOUT-PPC64-NEXT: <CGBitFieldInfo Offset:0 Size:24 IsSigned:0 StorageSize:24 StorageOffset:8
502 // LAYOUT-NEXT: ]>
504 // LAYOUT-LABEL: LLVMType:%"struct.N7::B2" =
505 // LAYOUT-SAME: type <{ ptr, [3 x i8], [5 x i8], %"struct.N7::B1.base", [5 x i8] }>
506 // LAYOUT-NEXT: NonVirtualBaseLLVMType:%"struct.N7::B2.base" = type <{ ptr, [3 x i8] }>
507 // LAYOUT: BitFields:[
508 // LAYOUT-X86-64-NEXT: <CGBitFieldInfo Offset:0 Size:24 IsSigned:0 StorageSize:24 StorageOffset:8
509 // LAYOUT-PPC64-NEXT: <CGBitFieldInfo Offset:0 Size:24 IsSigned:0 StorageSize:24 StorageOffset:8
510 // LAYOUT-NEXT: ]>