Lines Matching defs:Addend
168 LONG test_InterlockedIncrement(LONG volatile *Addend) {
169 return _InterlockedIncrement(Addend);
171 // CHECK: define{{.*}}i32 @test_InterlockedIncrement(ptr{{.*}}%Addend){{.*}}{
172 // CHECK: [[TMP:%[0-9]+]] = atomicrmw add ptr %Addend, i32 1 seq_cst, align 4
177 LONG test_InterlockedDecrement(LONG volatile *Addend) {
178 return _InterlockedDecrement(Addend);
180 // CHECK: define{{.*}}i32 @test_InterlockedDecrement(ptr{{.*}}%Addend){{.*}}{
181 // CHECK: [[TMP:%[0-9]+]] = atomicrmw sub ptr %Addend, i32 1 seq_cst, align 4
235 LONG test_InterlockedAdd(LONG volatile *Addend, LONG Value) {
236 return _InterlockedAdd(Addend, Value);
239 // CHECK-ARM-ARM64: define{{.*}}i32 @test_InterlockedAdd(ptr{{.*}}%Addend, i32 noundef %Value) {{.*}} {
240 // CHECK-ARM-ARM64: %[[OLDVAL:[0-9]+]] = atomicrmw add ptr %Addend, i32 %Value seq_cst, align 4
244 __int64 test_InterlockedAdd64(__int64 volatile *Addend, __int64 Value) {
245 return _InterlockedAdd64(Addend, Value);
248 // CHECK-ARM-ARM64: define{{.*}}i64 @test_InterlockedAdd64(ptr{{.*}}%Addend, i64 noundef %Value) {{.*}} {
249 // CHECK-ARM-ARM64: %[[OLDVAL:[0-9]+]] = atomicrmw add ptr %Addend, i64 %Value seq_cst, align 8
399 LONG test_InterlockedIncrement_acq(LONG volatile *Addend) {
400 return _InterlockedIncrement_acq(Addend);
402 // CHECK-ARM: define{{.*}}i32 @test_InterlockedIncrement_acq(ptr{{.*}}%Addend){{.*}}{
403 // CHECK-ARM: [[TMP:%[0-9]+]] = atomicrmw add ptr %Addend, i32 1 acquire, align 4
408 LONG test_InterlockedIncrement_rel(LONG volatile *Addend) {
409 return _InterlockedIncrement_rel(Addend);
411 // CHECK-ARM: define{{.*}}i32 @test_InterlockedIncrement_rel(ptr{{.*}}%Addend){{.*}}{
412 // CHECK-ARM: [[TMP:%[0-9]+]] = atomicrmw add ptr %Addend, i32 1 release, align 4
417 LONG test_InterlockedIncrement_nf(LONG volatile *Addend) {
418 return _InterlockedIncrement_nf(Addend);
420 // CHECK-ARM: define{{.*}}i32 @test_InterlockedIncrement_nf(ptr{{.*}}%Addend){{.*}}{
421 // CHECK-ARM: [[TMP:%[0-9]+]] = atomicrmw add ptr %Addend, i32 1 monotonic, align 4
426 LONG test_InterlockedDecrement_acq(LONG volatile *Addend) {
427 return _InterlockedDecrement_acq(Addend);
429 // CHECK-ARM: define{{.*}}i32 @test_InterlockedDecrement_acq(ptr{{.*}}%Addend){{.*}}{
430 // CHECK-ARM: [[TMP:%[0-9]+]] = atomicrmw sub ptr %Addend, i32 1 acquire, align 4
435 LONG test_InterlockedDecrement_rel(LONG volatile *Addend) {
436 return _InterlockedDecrement_rel(Addend);
438 // CHECK-ARM: define{{.*}}i32 @test_InterlockedDecrement_rel(ptr{{.*}}%Addend){{.*}}{
439 // CHECK-ARM: [[TMP:%[0-9]+]] = atomicrmw sub ptr %Addend, i32 1 release, align 4
444 LONG test_InterlockedDecrement_nf(LONG volatile *Addend) {
445 return _InterlockedDecrement_nf(Addend);
447 // CHECK-ARM: define{{.*}}i32 @test_InterlockedDecrement_nf(ptr{{.*}}%Addend){{.*}}{
448 // CHECK-ARM: [[TMP:%[0-9]+]] = atomicrmw sub ptr %Addend, i32 1 monotonic, align 4