Lines Matching defs:si2
14 volatile vector signed int si, si2;
41 // CHECK-NEXT: [[TMP4:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
65 si = si2;
88 // CHECK-NEXT: [[TMP4:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
112 si = +si2;
133 // CHECK-NEXT: [[TMP2:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
151 si = -si2;
172 // CHECK-NEXT: [[TMP4:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
174 // CHECK-NEXT: store volatile <4 x i32> [[INC4]], ptr @si2, align 8
203 ++si2;
230 // CHECK-NEXT: [[TMP4:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
232 // CHECK-NEXT: store volatile <4 x i32> [[INC4]], ptr @si2, align 8
261 si2++;
288 // CHECK-NEXT: [[TMP4:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
290 // CHECK-NEXT: store volatile <4 x i32> [[DEC4]], ptr @si2, align 8
319 --si2;
346 // CHECK-NEXT: [[TMP4:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
348 // CHECK-NEXT: store volatile <4 x i32> [[DEC4]], ptr @si2, align 8
377 si2--;
441 // CHECK-NEXT: [[TMP25:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
449 // CHECK-NEXT: [[TMP29:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
534 si = si + si2;
536 si = bi + si2;
593 // CHECK-NEXT: [[TMP16:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
659 si += si2;
729 // CHECK-NEXT: [[TMP25:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
737 // CHECK-NEXT: [[TMP29:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
822 si = si - si2;
824 si = bi - si2;
881 // CHECK-NEXT: [[TMP16:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
947 si -= si2;
985 // CHECK-NEXT: [[TMP9:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1022 si = si * si2;
1053 // CHECK-NEXT: [[TMP8:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1091 si *= si2;
1123 // CHECK-NEXT: [[TMP9:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1160 si = si / si2;
1191 // CHECK-NEXT: [[TMP8:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1229 si /= si2;
1261 // CHECK-NEXT: [[TMP9:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1294 si = si % si2;
1323 // CHECK-NEXT: [[TMP8:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1357 si %= si2;
1388 // CHECK-NEXT: [[TMP6:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1427 si = ~si2;
1500 // CHECK-NEXT: [[TMP29:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1508 // CHECK-NEXT: [[TMP33:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1603 si = si & si2;
1605 si = bi & si2;
1671 // CHECK-NEXT: [[TMP20:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1747 si &= si2;
1826 // CHECK-NEXT: [[TMP29:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1834 // CHECK-NEXT: [[TMP33:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
1929 si = si | si2;
1931 si = bi | si2;
1997 // CHECK-NEXT: [[TMP20:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
2073 si |= si2;
2152 // CHECK-NEXT: [[TMP29:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
2160 // CHECK-NEXT: [[TMP33:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
2255 si = si ^ si2;
2257 si = bi ^ si2;
2323 // CHECK-NEXT: [[TMP20:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
2399 si ^= si2;
2494 // CHECK-NEXT: [[TMP29:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
2511 // CHECK-NEXT: [[TMP36:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
2621 si = si << si2;
2625 ui = ui << si2;
2724 // CHECK-NEXT: [[TMP28:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
2741 // CHECK-NEXT: [[TMP35:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
2852 si <<= si2;
2856 ui <<= si2;
2956 // CHECK-NEXT: [[TMP29:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
2973 // CHECK-NEXT: [[TMP36:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
3083 si = si >> si2;
3087 ui = ui >> si2;
3186 // CHECK-NEXT: [[TMP28:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
3203 // CHECK-NEXT: [[TMP35:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
3314 si >>= si2;
3318 ui >>= si2;
3417 // CHECK-NEXT: [[TMP29:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
3427 // CHECK-NEXT: [[TMP33:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
3546 bi = si == si2;
3548 bi = bi == si2;
3647 // CHECK-NEXT: [[TMP29:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
3657 // CHECK-NEXT: [[TMP33:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
3776 bi = si != si2;
3778 bi = bi != si2;
3837 // CHECK-NEXT: [[TMP13:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
3898 bi = si >= si2;
3947 // CHECK-NEXT: [[TMP13:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
4008 bi = si > si2;
4057 // CHECK-NEXT: [[TMP13:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
4118 bi = si <= si2;
4167 // CHECK-NEXT: [[TMP13:%.*]] = load volatile <4 x i32>, ptr @si2, align 8
4228 bi = si < si2;