Lines Matching defs:sc2
6 volatile vector signed char sc, sc2;
33 // CHECK-NEXT: [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
59 sc = sc2;
80 // CHECK-NEXT: [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
106 sc = +sc2;
127 // CHECK-NEXT: [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
149 sc = -sc2;
160 // CHECK-NEXT: [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
162 // CHECK-NEXT: store volatile <16 x i8> [[INC]], ptr @sc2, align 8
197 ++sc2;
218 // CHECK-NEXT: [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
220 // CHECK-NEXT: store volatile <16 x i8> [[INC]], ptr @sc2, align 8
255 sc2++;
276 // CHECK-NEXT: [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
278 // CHECK-NEXT: store volatile <16 x i8> [[DEC]], ptr @sc2, align 8
313 --sc2;
334 // CHECK-NEXT: [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
336 // CHECK-NEXT: store volatile <16 x i8> [[DEC]], ptr @sc2, align 8
371 sc2--;
393 // CHECK-NEXT: [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
401 // CHECK-NEXT: [[TMP5:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
520 sc = sc + sc2;
522 sc = bc + sc2;
561 // CHECK-NEXT: [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
649 sc += sc2;
681 // CHECK-NEXT: [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
689 // CHECK-NEXT: [[TMP5:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
808 sc = sc - sc2;
810 sc = bc - sc2;
849 // CHECK-NEXT: [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
937 sc -= sc2;
969 // CHECK-NEXT: [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1016 sc = sc * sc2;
1037 // CHECK-NEXT: [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1085 sc *= sc2;
1107 // CHECK-NEXT: [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1154 sc = sc / sc2;
1175 // CHECK-NEXT: [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1223 sc /= sc2;
1245 // CHECK-NEXT: [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1288 sc = sc % sc2;
1307 // CHECK-NEXT: [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1351 sc %= sc2;
1370 // CHECK-NEXT: [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1419 sc = ~sc2;
1444 // CHECK-NEXT: [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1452 // CHECK-NEXT: [[TMP5:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1587 sc = sc & sc2;
1589 sc = bc & sc2;
1631 // CHECK-NEXT: [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1735 sc &= sc2;
1770 // CHECK-NEXT: [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1778 // CHECK-NEXT: [[TMP5:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
1913 sc = sc | sc2;
1915 sc = bc | sc2;
1957 // CHECK-NEXT: [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
2061 sc |= sc2;
2096 // CHECK-NEXT: [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
2104 // CHECK-NEXT: [[TMP5:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
2239 sc = sc ^ sc2;
2241 sc = bc ^ sc2;
2283 // CHECK-NEXT: [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
2387 sc ^= sc2;
2422 // CHECK-NEXT: [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
2440 // CHECK-NEXT: [[TMP8:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
2603 sc = sc << sc2;
2607 uc = uc << sc2;
2652 // CHECK-NEXT: [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
2670 // CHECK-NEXT: [[TMP7:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
2834 sc <<= sc2;
2838 uc <<= sc2;
2884 // CHECK-NEXT: [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
2902 // CHECK-NEXT: [[TMP8:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
3065 sc = sc >> sc2;
3069 uc = uc >> sc2;
3114 // CHECK-NEXT: [[TMP0:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
3132 // CHECK-NEXT: [[TMP7:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
3296 sc >>= sc2;
3300 uc >>= sc2;
3347 // CHECK-NEXT: [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
3357 // CHECK-NEXT: [[TMP5:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
3530 bc = sc == sc2;
3532 bc = bc == sc2;
3577 // CHECK-NEXT: [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
3587 // CHECK-NEXT: [[TMP5:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
3760 bc = sc != sc2;
3762 bc = bc != sc2;
3807 // CHECK-NEXT: [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
3890 bc = sc >= sc2;
3917 // CHECK-NEXT: [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
4000 bc = sc > sc2;
4027 // CHECK-NEXT: [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
4110 bc = sc <= sc2;
4137 // CHECK-NEXT: [[TMP1:%.*]] = load volatile <16 x i8>, ptr @sc2, align 8
4220 bc = sc < sc2;