Lines Matching refs:simm5_overflow
20 #define simm5_overflow (16) macro
93 __riscv_sf_vc_i_se_u8mf8(p27_26, p24_20, p11_7, simm5_overflow, vl); in test_sf_vc_i_se_u8mf8_simm5_overflow()
169 return __riscv_sf_vc_v_i_se_u8mf8(p27_26, p24_20, simm5_overflow, vl); in test_sf_vc_v_i_se_u8mf8_simm5_overflow()
201 return __riscv_sf_vc_v_i_u8mf8(p27_26, p24_20, simm5_overflow, vl); in test_sf_vc_v_i_u8mf8_simm5_overflow()
277 __riscv_sf_vc_iv_se_u8mf8(p27_26, p11_7, vs2, simm5_overflow, vl); in test_sf_vc_iv_se_u8mf8_simm5_overflow()
369 return __riscv_sf_vc_v_iv_se_u8mf8(p27_26, vs2, simm5_overflow, vl); in test_sf_vc_v_iv_se_u8mf8_simm5_overflow()
391 return __riscv_sf_vc_v_iv_u8mf8(p27_26, vs2, simm5_overflow, vl); in test_sf_vc_v_iv_u8mf8_simm5_overflow()
461 __riscv_sf_vc_ivv_se_u8mf8(p27_26, vd, vs2, simm5_overflow, vl); in test_sf_vc_ivv_se_u8mf8_simm5_overflow()
543 return __riscv_sf_vc_v_ivv_se_u8mf8(p27_26, vd, vs2, simm5_overflow, vl); in test_sf_vc_v_ivv_se_u8mf8_simm5_overflow()
565 return __riscv_sf_vc_v_ivv_u8mf8(p27_26, vd, vs2, simm5_overflow, vl); in test_sf_vc_v_ivv_u8mf8_simm5_overflow()
635 __riscv_sf_vc_ivw_se_u8mf8(p27_26, vd, vs2, simm5_overflow, vl); in test_sf_vc_ivw_se_u8mf8_simm5_overflow()
717 return __riscv_sf_vc_v_ivw_se_u8mf8(p27_26, vd, vs2, simm5_overflow, vl); in test_sf_vc_v_ivw_se_u8mf8_simm5_overflow()
739 return __riscv_sf_vc_v_ivw_u8mf8(p27_26, vd, vs2, simm5_overflow, vl); in test_sf_vc_v_ivw_u8mf8_simm5_overflow()