Lines Matching refs:vs2
22 void test_sf_vc_vvv_se_u8mf8(vuint8mf8_t vd, vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl) { in test_sf_vc_vvv_se_u8mf8() argument
23 __riscv_sf_vc_vvv_se_u8mf8(p27_26, vd, vs2, vs1, vl); in test_sf_vc_vvv_se_u8mf8()
36 void test_sf_vc_vvv_se_u8mf4(vuint8mf4_t vd, vuint8mf4_t vs2, vuint8mf4_t vs1, size_t vl) { in test_sf_vc_vvv_se_u8mf4() argument
37 __riscv_sf_vc_vvv_se_u8mf4(p27_26, vd, vs2, vs1, vl); in test_sf_vc_vvv_se_u8mf4()
50 void test_sf_vc_vvv_se_u8mf2(vuint8mf2_t vd, vuint8mf2_t vs2, vuint8mf2_t vs1, size_t vl) { in test_sf_vc_vvv_se_u8mf2() argument
51 __riscv_sf_vc_vvv_se_u8mf2(p27_26, vd, vs2, vs1, vl); in test_sf_vc_vvv_se_u8mf2()
64 void test_sf_vc_vvv_se_u8m1(vuint8m1_t vd, vuint8m1_t vs2, vuint8m1_t vs1, size_t vl) { in test_sf_vc_vvv_se_u8m1() argument
65 __riscv_sf_vc_vvv_se_u8m1(p27_26, vd, vs2, vs1, vl); in test_sf_vc_vvv_se_u8m1()
78 void test_sf_vc_vvv_se_u8m2(vuint8m2_t vd, vuint8m2_t vs2, vuint8m2_t vs1, size_t vl) { in test_sf_vc_vvv_se_u8m2() argument
79 __riscv_sf_vc_vvv_se_u8m2(p27_26, vd, vs2, vs1, vl); in test_sf_vc_vvv_se_u8m2()
92 void test_sf_vc_vvv_se_u8m4(vuint8m4_t vd, vuint8m4_t vs2, vuint8m4_t vs1, size_t vl) { in test_sf_vc_vvv_se_u8m4() argument
93 __riscv_sf_vc_vvv_se_u8m4(p27_26, vd, vs2, vs1, vl); in test_sf_vc_vvv_se_u8m4()
106 void test_sf_vc_vvv_se_u8m8(vuint8m8_t vd, vuint8m8_t vs2, vuint8m8_t vs1, size_t vl) { in test_sf_vc_vvv_se_u8m8() argument
107 __riscv_sf_vc_vvv_se_u8m8(p27_26, vd, vs2, vs1, vl); in test_sf_vc_vvv_se_u8m8()
120 void test_sf_vc_vvv_se_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs2, vuint16mf4_t vs1, size_t vl) { in test_sf_vc_vvv_se_u16mf4() argument
121 __riscv_sf_vc_vvv_se_u16mf4(p27_26, vd, vs2, vs1, vl); in test_sf_vc_vvv_se_u16mf4()
134 void test_sf_vc_vvv_se_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs2, vuint16mf2_t vs1, size_t vl) { in test_sf_vc_vvv_se_u16mf2() argument
135 __riscv_sf_vc_vvv_se_u16mf2(p27_26, vd, vs2, vs1, vl); in test_sf_vc_vvv_se_u16mf2()
148 void test_sf_vc_vvv_se_u16m1(vuint16m1_t vd, vuint16m1_t vs2, vuint16m1_t vs1, size_t vl) { in test_sf_vc_vvv_se_u16m1() argument
149 __riscv_sf_vc_vvv_se_u16m1(p27_26, vd, vs2, vs1, vl); in test_sf_vc_vvv_se_u16m1()
162 void test_sf_vc_vvv_se_u16m2(vuint16m2_t vd, vuint16m2_t vs2, vuint16m2_t vs1, size_t vl) { in test_sf_vc_vvv_se_u16m2() argument
163 __riscv_sf_vc_vvv_se_u16m2(p27_26, vd, vs2, vs1, vl); in test_sf_vc_vvv_se_u16m2()
176 void test_sf_vc_vvv_se_u16m4(vuint16m4_t vd, vuint16m4_t vs2, vuint16m4_t vs1, size_t vl) { in test_sf_vc_vvv_se_u16m4() argument
177 __riscv_sf_vc_vvv_se_u16m4(p27_26, vd, vs2, vs1, vl); in test_sf_vc_vvv_se_u16m4()
190 void test_sf_vc_vvv_se_u16m8(vuint16m8_t vd, vuint16m8_t vs2, vuint16m8_t vs1, size_t vl) { in test_sf_vc_vvv_se_u16m8() argument
191 __riscv_sf_vc_vvv_se_u16m8(p27_26, vd, vs2, vs1, vl); in test_sf_vc_vvv_se_u16m8()
204 void test_sf_vc_vvv_se_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, vuint32mf2_t vs1, size_t vl) { in test_sf_vc_vvv_se_u32mf2() argument
205 __riscv_sf_vc_vvv_se_u32mf2(p27_26, vd, vs2, vs1, vl); in test_sf_vc_vvv_se_u32mf2()
218 void test_sf_vc_vvv_se_u32m1(vuint32m1_t vd, vuint32m1_t vs2, vuint32m1_t vs1, size_t vl) { in test_sf_vc_vvv_se_u32m1() argument
219 __riscv_sf_vc_vvv_se_u32m1(p27_26, vd, vs2, vs1, vl); in test_sf_vc_vvv_se_u32m1()
232 void test_sf_vc_vvv_se_u32m2(vuint32m2_t vd, vuint32m2_t vs2, vuint32m2_t vs1, size_t vl) { in test_sf_vc_vvv_se_u32m2() argument
233 __riscv_sf_vc_vvv_se_u32m2(p27_26, vd, vs2, vs1, vl); in test_sf_vc_vvv_se_u32m2()
246 void test_sf_vc_vvv_se_u32m4(vuint32m4_t vd, vuint32m4_t vs2, vuint32m4_t vs1, size_t vl) { in test_sf_vc_vvv_se_u32m4() argument
247 __riscv_sf_vc_vvv_se_u32m4(p27_26, vd, vs2, vs1, vl); in test_sf_vc_vvv_se_u32m4()
260 void test_sf_vc_vvv_se_u32m8(vuint32m8_t vd, vuint32m8_t vs2, vuint32m8_t vs1, size_t vl) { in test_sf_vc_vvv_se_u32m8() argument
261 __riscv_sf_vc_vvv_se_u32m8(p27_26, vd, vs2, vs1, vl); in test_sf_vc_vvv_se_u32m8()
274 void test_sf_vc_vvv_se_u64m1(vuint64m1_t vd, vuint64m1_t vs2, vuint64m1_t vs1, size_t vl) { in test_sf_vc_vvv_se_u64m1() argument
275 __riscv_sf_vc_vvv_se_u64m1(p27_26, vd, vs2, vs1, vl); in test_sf_vc_vvv_se_u64m1()
288 void test_sf_vc_vvv_se_u64m2(vuint64m2_t vd, vuint64m2_t vs2, vuint64m2_t vs1, size_t vl) { in test_sf_vc_vvv_se_u64m2() argument
289 __riscv_sf_vc_vvv_se_u64m2(p27_26, vd, vs2, vs1, vl); in test_sf_vc_vvv_se_u64m2()
302 void test_sf_vc_vvv_se_u64m4(vuint64m4_t vd, vuint64m4_t vs2, vuint64m4_t vs1, size_t vl) { in test_sf_vc_vvv_se_u64m4() argument
303 __riscv_sf_vc_vvv_se_u64m4(p27_26, vd, vs2, vs1, vl); in test_sf_vc_vvv_se_u64m4()
316 void test_sf_vc_vvv_se_u64m8(vuint64m8_t vd, vuint64m8_t vs2, vuint64m8_t vs1, size_t vl) { in test_sf_vc_vvv_se_u64m8() argument
317 __riscv_sf_vc_vvv_se_u64m8(p27_26, vd, vs2, vs1, vl); in test_sf_vc_vvv_se_u64m8()
330 vuint8mf8_t test_sf_vc_v_vvv_se_u8mf8(vuint8mf8_t vd, vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl) { in test_sf_vc_v_vvv_se_u8mf8() argument
331 return __riscv_sf_vc_v_vvv_se_u8mf8(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_se_u8mf8()
344 vuint8mf4_t test_sf_vc_v_vvv_se_u8mf4(vuint8mf4_t vd, vuint8mf4_t vs2, vuint8mf4_t vs1, size_t vl) { in test_sf_vc_v_vvv_se_u8mf4() argument
345 return __riscv_sf_vc_v_vvv_se_u8mf4(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_se_u8mf4()
358 vuint8mf2_t test_sf_vc_v_vvv_se_u8mf2(vuint8mf2_t vd, vuint8mf2_t vs2, vuint8mf2_t vs1, size_t vl) { in test_sf_vc_v_vvv_se_u8mf2() argument
359 return __riscv_sf_vc_v_vvv_se_u8mf2(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_se_u8mf2()
372 vuint8m1_t test_sf_vc_v_vvv_se_u8m1(vuint8m1_t vd, vuint8m1_t vs2, vuint8m1_t vs1, size_t vl) { in test_sf_vc_v_vvv_se_u8m1() argument
373 return __riscv_sf_vc_v_vvv_se_u8m1(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_se_u8m1()
386 vuint8m2_t test_sf_vc_v_vvv_se_u8m2(vuint8m2_t vd, vuint8m2_t vs2, vuint8m2_t vs1, size_t vl) { in test_sf_vc_v_vvv_se_u8m2() argument
387 return __riscv_sf_vc_v_vvv_se_u8m2(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_se_u8m2()
400 vuint8m4_t test_sf_vc_v_vvv_se_u8m4(vuint8m4_t vd, vuint8m4_t vs2, vuint8m4_t vs1, size_t vl) { in test_sf_vc_v_vvv_se_u8m4() argument
401 return __riscv_sf_vc_v_vvv_se_u8m4(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_se_u8m4()
414 vuint8m8_t test_sf_vc_v_vvv_se_u8m8(vuint8m8_t vd, vuint8m8_t vs2, vuint8m8_t vs1, size_t vl) { in test_sf_vc_v_vvv_se_u8m8() argument
415 return __riscv_sf_vc_v_vvv_se_u8m8(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_se_u8m8()
428 vuint16mf4_t test_sf_vc_v_vvv_se_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs2, vuint16mf4_t vs1, size_t… in test_sf_vc_v_vvv_se_u16mf4() argument
429 return __riscv_sf_vc_v_vvv_se_u16mf4(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_se_u16mf4()
442 vuint16mf2_t test_sf_vc_v_vvv_se_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs2, vuint16mf2_t vs1, size_t… in test_sf_vc_v_vvv_se_u16mf2() argument
443 return __riscv_sf_vc_v_vvv_se_u16mf2(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_se_u16mf2()
456 vuint16m1_t test_sf_vc_v_vvv_se_u16m1(vuint16m1_t vd, vuint16m1_t vs2, vuint16m1_t vs1, size_t vl) { in test_sf_vc_v_vvv_se_u16m1() argument
457 return __riscv_sf_vc_v_vvv_se_u16m1(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_se_u16m1()
470 vuint16m2_t test_sf_vc_v_vvv_se_u16m2(vuint16m2_t vd, vuint16m2_t vs2, vuint16m2_t vs1, size_t vl) { in test_sf_vc_v_vvv_se_u16m2() argument
471 return __riscv_sf_vc_v_vvv_se_u16m2(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_se_u16m2()
484 vuint16m4_t test_sf_vc_v_vvv_se_u16m4(vuint16m4_t vd, vuint16m4_t vs2, vuint16m4_t vs1, size_t vl) { in test_sf_vc_v_vvv_se_u16m4() argument
485 return __riscv_sf_vc_v_vvv_se_u16m4(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_se_u16m4()
498 vuint16m8_t test_sf_vc_v_vvv_se_u16m8(vuint16m8_t vd, vuint16m8_t vs2, vuint16m8_t vs1, size_t vl) { in test_sf_vc_v_vvv_se_u16m8() argument
499 return __riscv_sf_vc_v_vvv_se_u16m8(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_se_u16m8()
512 vuint32mf2_t test_sf_vc_v_vvv_se_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, vuint32mf2_t vs1, size_t… in test_sf_vc_v_vvv_se_u32mf2() argument
513 return __riscv_sf_vc_v_vvv_se_u32mf2(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_se_u32mf2()
526 vuint32m1_t test_sf_vc_v_vvv_se_u32m1(vuint32m1_t vd, vuint32m1_t vs2, vuint32m1_t vs1, size_t vl) { in test_sf_vc_v_vvv_se_u32m1() argument
527 return __riscv_sf_vc_v_vvv_se_u32m1(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_se_u32m1()
540 vuint32m2_t test_sf_vc_v_vvv_se_u32m2(vuint32m2_t vd, vuint32m2_t vs2, vuint32m2_t vs1, size_t vl) { in test_sf_vc_v_vvv_se_u32m2() argument
541 return __riscv_sf_vc_v_vvv_se_u32m2(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_se_u32m2()
554 vuint32m4_t test_sf_vc_v_vvv_se_u32m4(vuint32m4_t vd, vuint32m4_t vs2, vuint32m4_t vs1, size_t vl) { in test_sf_vc_v_vvv_se_u32m4() argument
555 return __riscv_sf_vc_v_vvv_se_u32m4(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_se_u32m4()
568 vuint32m8_t test_sf_vc_v_vvv_se_u32m8(vuint32m8_t vd, vuint32m8_t vs2, vuint32m8_t vs1, size_t vl) { in test_sf_vc_v_vvv_se_u32m8() argument
569 return __riscv_sf_vc_v_vvv_se_u32m8(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_se_u32m8()
582 vuint64m1_t test_sf_vc_v_vvv_se_u64m1(vuint64m1_t vd, vuint64m1_t vs2, vuint64m1_t vs1, size_t vl) { in test_sf_vc_v_vvv_se_u64m1() argument
583 return __riscv_sf_vc_v_vvv_se_u64m1(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_se_u64m1()
596 vuint64m2_t test_sf_vc_v_vvv_se_u64m2(vuint64m2_t vd, vuint64m2_t vs2, vuint64m2_t vs1, size_t vl) { in test_sf_vc_v_vvv_se_u64m2() argument
597 return __riscv_sf_vc_v_vvv_se_u64m2(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_se_u64m2()
610 vuint64m4_t test_sf_vc_v_vvv_se_u64m4(vuint64m4_t vd, vuint64m4_t vs2, vuint64m4_t vs1, size_t vl) { in test_sf_vc_v_vvv_se_u64m4() argument
611 return __riscv_sf_vc_v_vvv_se_u64m4(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_se_u64m4()
624 vuint64m8_t test_sf_vc_v_vvv_se_u64m8(vuint64m8_t vd, vuint64m8_t vs2, vuint64m8_t vs1, size_t vl) { in test_sf_vc_v_vvv_se_u64m8() argument
625 return __riscv_sf_vc_v_vvv_se_u64m8(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_se_u64m8()
638 vuint8mf8_t test_sf_vc_v_vvv_u8mf8(vuint8mf8_t vd, vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl) { in test_sf_vc_v_vvv_u8mf8() argument
639 return __riscv_sf_vc_v_vvv_u8mf8(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_u8mf8()
652 vuint8mf4_t test_sf_vc_v_vvv_u8mf4(vuint8mf4_t vd, vuint8mf4_t vs2, vuint8mf4_t vs1, size_t vl) { in test_sf_vc_v_vvv_u8mf4() argument
653 return __riscv_sf_vc_v_vvv_u8mf4(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_u8mf4()
666 vuint8mf2_t test_sf_vc_v_vvv_u8mf2(vuint8mf2_t vd, vuint8mf2_t vs2, vuint8mf2_t vs1, size_t vl) { in test_sf_vc_v_vvv_u8mf2() argument
667 return __riscv_sf_vc_v_vvv_u8mf2(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_u8mf2()
680 vuint8m1_t test_sf_vc_v_vvv_u8m1(vuint8m1_t vd, vuint8m1_t vs2, vuint8m1_t vs1, size_t vl) { in test_sf_vc_v_vvv_u8m1() argument
681 return __riscv_sf_vc_v_vvv_u8m1(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_u8m1()
694 vuint8m2_t test_sf_vc_v_vvv_u8m2(vuint8m2_t vd, vuint8m2_t vs2, vuint8m2_t vs1, size_t vl) { in test_sf_vc_v_vvv_u8m2() argument
695 return __riscv_sf_vc_v_vvv_u8m2(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_u8m2()
708 vuint8m4_t test_sf_vc_v_vvv_u8m4(vuint8m4_t vd, vuint8m4_t vs2, vuint8m4_t vs1, size_t vl) { in test_sf_vc_v_vvv_u8m4() argument
709 return __riscv_sf_vc_v_vvv_u8m4(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_u8m4()
722 vuint8m8_t test_sf_vc_v_vvv_u8m8(vuint8m8_t vd, vuint8m8_t vs2, vuint8m8_t vs1, size_t vl) { in test_sf_vc_v_vvv_u8m8() argument
723 return __riscv_sf_vc_v_vvv_u8m8(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_u8m8()
736 vuint16mf4_t test_sf_vc_v_vvv_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs2, vuint16mf4_t vs1, size_t vl… in test_sf_vc_v_vvv_u16mf4() argument
737 return __riscv_sf_vc_v_vvv_u16mf4(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_u16mf4()
750 vuint16mf2_t test_sf_vc_v_vvv_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs2, vuint16mf2_t vs1, size_t vl… in test_sf_vc_v_vvv_u16mf2() argument
751 return __riscv_sf_vc_v_vvv_u16mf2(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_u16mf2()
764 vuint16m1_t test_sf_vc_v_vvv_u16m1(vuint16m1_t vd, vuint16m1_t vs2, vuint16m1_t vs1, size_t vl) { in test_sf_vc_v_vvv_u16m1() argument
765 return __riscv_sf_vc_v_vvv_u16m1(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_u16m1()
778 vuint16m2_t test_sf_vc_v_vvv_u16m2(vuint16m2_t vd, vuint16m2_t vs2, vuint16m2_t vs1, size_t vl) { in test_sf_vc_v_vvv_u16m2() argument
779 return __riscv_sf_vc_v_vvv_u16m2(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_u16m2()
792 vuint16m4_t test_sf_vc_v_vvv_u16m4(vuint16m4_t vd, vuint16m4_t vs2, vuint16m4_t vs1, size_t vl) { in test_sf_vc_v_vvv_u16m4() argument
793 return __riscv_sf_vc_v_vvv_u16m4(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_u16m4()
806 vuint16m8_t test_sf_vc_v_vvv_u16m8(vuint16m8_t vd, vuint16m8_t vs2, vuint16m8_t vs1, size_t vl) { in test_sf_vc_v_vvv_u16m8() argument
807 return __riscv_sf_vc_v_vvv_u16m8(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_u16m8()
820 vuint32mf2_t test_sf_vc_v_vvv_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, vuint32mf2_t vs1, size_t vl… in test_sf_vc_v_vvv_u32mf2() argument
821 return __riscv_sf_vc_v_vvv_u32mf2(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_u32mf2()
834 vuint32m1_t test_sf_vc_v_vvv_u32m1(vuint32m1_t vd, vuint32m1_t vs2, vuint32m1_t vs1, size_t vl) { in test_sf_vc_v_vvv_u32m1() argument
835 return __riscv_sf_vc_v_vvv_u32m1(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_u32m1()
848 vuint32m2_t test_sf_vc_v_vvv_u32m2(vuint32m2_t vd, vuint32m2_t vs2, vuint32m2_t vs1, size_t vl) { in test_sf_vc_v_vvv_u32m2() argument
849 return __riscv_sf_vc_v_vvv_u32m2(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_u32m2()
862 vuint32m4_t test_sf_vc_v_vvv_u32m4(vuint32m4_t vd, vuint32m4_t vs2, vuint32m4_t vs1, size_t vl) { in test_sf_vc_v_vvv_u32m4() argument
863 return __riscv_sf_vc_v_vvv_u32m4(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_u32m4()
876 vuint32m8_t test_sf_vc_v_vvv_u32m8(vuint32m8_t vd, vuint32m8_t vs2, vuint32m8_t vs1, size_t vl) { in test_sf_vc_v_vvv_u32m8() argument
877 return __riscv_sf_vc_v_vvv_u32m8(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_u32m8()
890 vuint64m1_t test_sf_vc_v_vvv_u64m1(vuint64m1_t vd, vuint64m1_t vs2, vuint64m1_t vs1, size_t vl) { in test_sf_vc_v_vvv_u64m1() argument
891 return __riscv_sf_vc_v_vvv_u64m1(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_u64m1()
904 vuint64m2_t test_sf_vc_v_vvv_u64m2(vuint64m2_t vd, vuint64m2_t vs2, vuint64m2_t vs1, size_t vl) { in test_sf_vc_v_vvv_u64m2() argument
905 return __riscv_sf_vc_v_vvv_u64m2(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_u64m2()
918 vuint64m4_t test_sf_vc_v_vvv_u64m4(vuint64m4_t vd, vuint64m4_t vs2, vuint64m4_t vs1, size_t vl) { in test_sf_vc_v_vvv_u64m4() argument
919 return __riscv_sf_vc_v_vvv_u64m4(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_u64m4()
932 vuint64m8_t test_sf_vc_v_vvv_u64m8(vuint64m8_t vd, vuint64m8_t vs2, vuint64m8_t vs1, size_t vl) { in test_sf_vc_v_vvv_u64m8() argument
933 return __riscv_sf_vc_v_vvv_u64m8(p27_26, vd, vs2, vs1, vl); in test_sf_vc_v_vvv_u64m8()
946 void test_sf_vc_xvv_se_u8mf8(vuint8mf8_t vd, vuint8mf8_t vs2, uint8_t rs1, size_t vl) { in test_sf_vc_xvv_se_u8mf8() argument
947 __riscv_sf_vc_xvv_se_u8mf8(p27_26, vd, vs2, rs1, vl); in test_sf_vc_xvv_se_u8mf8()
960 void test_sf_vc_xvv_se_u8mf4(vuint8mf4_t vd, vuint8mf4_t vs2, uint8_t rs1, size_t vl) { in test_sf_vc_xvv_se_u8mf4() argument
961 __riscv_sf_vc_xvv_se_u8mf4(p27_26, vd, vs2, rs1, vl); in test_sf_vc_xvv_se_u8mf4()
974 void test_sf_vc_xvv_se_u8mf2(vuint8mf2_t vd, vuint8mf2_t vs2, uint8_t rs1, size_t vl) { in test_sf_vc_xvv_se_u8mf2() argument
975 __riscv_sf_vc_xvv_se_u8mf2(p27_26, vd, vs2, rs1, vl); in test_sf_vc_xvv_se_u8mf2()
988 void test_sf_vc_xvv_se_u8m1(vuint8m1_t vd, vuint8m1_t vs2, uint8_t rs1, size_t vl) { in test_sf_vc_xvv_se_u8m1() argument
989 __riscv_sf_vc_xvv_se_u8m1(p27_26, vd, vs2, rs1, vl); in test_sf_vc_xvv_se_u8m1()
1002 void test_sf_vc_xvv_se_u8m2(vuint8m2_t vd, vuint8m2_t vs2, uint8_t rs1, size_t vl) { in test_sf_vc_xvv_se_u8m2() argument
1003 __riscv_sf_vc_xvv_se_u8m2(p27_26, vd, vs2, rs1, vl); in test_sf_vc_xvv_se_u8m2()
1016 void test_sf_vc_xvv_se_u8m4(vuint8m4_t vd, vuint8m4_t vs2, uint8_t rs1, size_t vl) { in test_sf_vc_xvv_se_u8m4() argument
1017 __riscv_sf_vc_xvv_se_u8m4(p27_26, vd, vs2, rs1, vl); in test_sf_vc_xvv_se_u8m4()
1030 void test_sf_vc_xvv_se_u8m8(vuint8m8_t vd, vuint8m8_t vs2, uint8_t rs1, size_t vl) { in test_sf_vc_xvv_se_u8m8() argument
1031 __riscv_sf_vc_xvv_se_u8m8(p27_26, vd, vs2, rs1, vl); in test_sf_vc_xvv_se_u8m8()
1044 void test_sf_vc_xvv_se_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs2, uint16_t rs1, size_t vl) { in test_sf_vc_xvv_se_u16mf4() argument
1045 __riscv_sf_vc_xvv_se_u16mf4(p27_26, vd, vs2, rs1, vl); in test_sf_vc_xvv_se_u16mf4()
1058 void test_sf_vc_xvv_se_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs2, uint16_t rs1, size_t vl) { in test_sf_vc_xvv_se_u16mf2() argument
1059 __riscv_sf_vc_xvv_se_u16mf2(p27_26, vd, vs2, rs1, vl); in test_sf_vc_xvv_se_u16mf2()
1072 void test_sf_vc_xvv_se_u16m1(vuint16m1_t vd, vuint16m1_t vs2, uint16_t rs1, size_t vl) { in test_sf_vc_xvv_se_u16m1() argument
1073 __riscv_sf_vc_xvv_se_u16m1(p27_26, vd, vs2, rs1, vl); in test_sf_vc_xvv_se_u16m1()
1086 void test_sf_vc_xvv_se_u16m2(vuint16m2_t vd, vuint16m2_t vs2, uint16_t rs1, size_t vl) { in test_sf_vc_xvv_se_u16m2() argument
1087 __riscv_sf_vc_xvv_se_u16m2(p27_26, vd, vs2, rs1, vl); in test_sf_vc_xvv_se_u16m2()
1100 void test_sf_vc_xvv_se_u16m4(vuint16m4_t vd, vuint16m4_t vs2, uint16_t rs1, size_t vl) { in test_sf_vc_xvv_se_u16m4() argument
1101 __riscv_sf_vc_xvv_se_u16m4(p27_26, vd, vs2, rs1, vl); in test_sf_vc_xvv_se_u16m4()
1114 void test_sf_vc_xvv_se_u16m8(vuint16m8_t vd, vuint16m8_t vs2, uint16_t rs1, size_t vl) { in test_sf_vc_xvv_se_u16m8() argument
1115 __riscv_sf_vc_xvv_se_u16m8(p27_26, vd, vs2, rs1, vl); in test_sf_vc_xvv_se_u16m8()
1128 void test_sf_vc_xvv_se_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, uint32_t rs1, size_t vl) { in test_sf_vc_xvv_se_u32mf2() argument
1129 __riscv_sf_vc_xvv_se_u32mf2(p27_26, vd, vs2, rs1, vl); in test_sf_vc_xvv_se_u32mf2()
1142 void test_sf_vc_xvv_se_u32m1(vuint32m1_t vd, vuint32m1_t vs2, uint32_t rs1, size_t vl) { in test_sf_vc_xvv_se_u32m1() argument
1143 __riscv_sf_vc_xvv_se_u32m1(p27_26, vd, vs2, rs1, vl); in test_sf_vc_xvv_se_u32m1()
1156 void test_sf_vc_xvv_se_u32m2(vuint32m2_t vd, vuint32m2_t vs2, uint32_t rs1, size_t vl) { in test_sf_vc_xvv_se_u32m2() argument
1157 __riscv_sf_vc_xvv_se_u32m2(p27_26, vd, vs2, rs1, vl); in test_sf_vc_xvv_se_u32m2()
1170 void test_sf_vc_xvv_se_u32m4(vuint32m4_t vd, vuint32m4_t vs2, uint32_t rs1, size_t vl) { in test_sf_vc_xvv_se_u32m4() argument
1171 __riscv_sf_vc_xvv_se_u32m4(p27_26, vd, vs2, rs1, vl); in test_sf_vc_xvv_se_u32m4()
1184 void test_sf_vc_xvv_se_u32m8(vuint32m8_t vd, vuint32m8_t vs2, uint32_t rs1, size_t vl) { in test_sf_vc_xvv_se_u32m8() argument
1185 __riscv_sf_vc_xvv_se_u32m8(p27_26, vd, vs2, rs1, vl); in test_sf_vc_xvv_se_u32m8()
1198 vuint8mf8_t test_sf_vc_v_xvv_se_u8mf8(vuint8mf8_t vd, vuint8mf8_t vs2, uint8_t rs1, size_t vl) { in test_sf_vc_v_xvv_se_u8mf8() argument
1199 return __riscv_sf_vc_v_xvv_se_u8mf8(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_se_u8mf8()
1212 vuint8mf4_t test_sf_vc_v_xvv_se_u8mf4(vuint8mf4_t vd, vuint8mf4_t vs2, uint8_t rs1, size_t vl) { in test_sf_vc_v_xvv_se_u8mf4() argument
1213 return __riscv_sf_vc_v_xvv_se_u8mf4(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_se_u8mf4()
1226 vuint8mf2_t test_sf_vc_v_xvv_se_u8mf2(vuint8mf2_t vd, vuint8mf2_t vs2, uint8_t rs1, size_t vl) { in test_sf_vc_v_xvv_se_u8mf2() argument
1227 return __riscv_sf_vc_v_xvv_se_u8mf2(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_se_u8mf2()
1240 vuint8m1_t test_sf_vc_v_xvv_se_u8m1(vuint8m1_t vd, vuint8m1_t vs2, uint8_t rs1, size_t vl) { in test_sf_vc_v_xvv_se_u8m1() argument
1241 return __riscv_sf_vc_v_xvv_se_u8m1(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_se_u8m1()
1254 vuint8m2_t test_sf_vc_v_xvv_se_u8m2(vuint8m2_t vd, vuint8m2_t vs2, uint8_t rs1, size_t vl) { in test_sf_vc_v_xvv_se_u8m2() argument
1255 return __riscv_sf_vc_v_xvv_se_u8m2(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_se_u8m2()
1268 vuint8m4_t test_sf_vc_v_xvv_se_u8m4(vuint8m4_t vd, vuint8m4_t vs2, uint8_t rs1, size_t vl) { in test_sf_vc_v_xvv_se_u8m4() argument
1269 return __riscv_sf_vc_v_xvv_se_u8m4(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_se_u8m4()
1282 vuint8m8_t test_sf_vc_v_xvv_se_u8m8(vuint8m8_t vd, vuint8m8_t vs2, uint8_t rs1, size_t vl) { in test_sf_vc_v_xvv_se_u8m8() argument
1283 return __riscv_sf_vc_v_xvv_se_u8m8(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_se_u8m8()
1296 vuint16mf4_t test_sf_vc_v_xvv_se_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs2, uint16_t rs1, size_t vl)… in test_sf_vc_v_xvv_se_u16mf4() argument
1297 return __riscv_sf_vc_v_xvv_se_u16mf4(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_se_u16mf4()
1310 vuint16mf2_t test_sf_vc_v_xvv_se_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs2, uint16_t rs1, size_t vl)… in test_sf_vc_v_xvv_se_u16mf2() argument
1311 return __riscv_sf_vc_v_xvv_se_u16mf2(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_se_u16mf2()
1324 vuint16m1_t test_sf_vc_v_xvv_se_u16m1(vuint16m1_t vd, vuint16m1_t vs2, uint16_t rs1, size_t vl) { in test_sf_vc_v_xvv_se_u16m1() argument
1325 return __riscv_sf_vc_v_xvv_se_u16m1(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_se_u16m1()
1338 vuint16m2_t test_sf_vc_v_xvv_se_u16m2(vuint16m2_t vd, vuint16m2_t vs2, uint16_t rs1, size_t vl) { in test_sf_vc_v_xvv_se_u16m2() argument
1339 return __riscv_sf_vc_v_xvv_se_u16m2(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_se_u16m2()
1352 vuint16m4_t test_sf_vc_v_xvv_se_u16m4(vuint16m4_t vd, vuint16m4_t vs2, uint16_t rs1, size_t vl) { in test_sf_vc_v_xvv_se_u16m4() argument
1353 return __riscv_sf_vc_v_xvv_se_u16m4(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_se_u16m4()
1366 vuint16m8_t test_sf_vc_v_xvv_se_u16m8(vuint16m8_t vd, vuint16m8_t vs2, uint16_t rs1, size_t vl) { in test_sf_vc_v_xvv_se_u16m8() argument
1367 return __riscv_sf_vc_v_xvv_se_u16m8(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_se_u16m8()
1380 vuint32mf2_t test_sf_vc_v_xvv_se_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, uint32_t rs1, size_t vl)… in test_sf_vc_v_xvv_se_u32mf2() argument
1381 return __riscv_sf_vc_v_xvv_se_u32mf2(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_se_u32mf2()
1394 vuint32m1_t test_sf_vc_v_xvv_se_u32m1(vuint32m1_t vd, vuint32m1_t vs2, uint32_t rs1, size_t vl) { in test_sf_vc_v_xvv_se_u32m1() argument
1395 return __riscv_sf_vc_v_xvv_se_u32m1(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_se_u32m1()
1408 vuint32m2_t test_sf_vc_v_xvv_se_u32m2(vuint32m2_t vd, vuint32m2_t vs2, uint32_t rs1, size_t vl) { in test_sf_vc_v_xvv_se_u32m2() argument
1409 return __riscv_sf_vc_v_xvv_se_u32m2(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_se_u32m2()
1422 vuint32m4_t test_sf_vc_v_xvv_se_u32m4(vuint32m4_t vd, vuint32m4_t vs2, uint32_t rs1, size_t vl) { in test_sf_vc_v_xvv_se_u32m4() argument
1423 return __riscv_sf_vc_v_xvv_se_u32m4(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_se_u32m4()
1436 vuint32m8_t test_sf_vc_v_xvv_se_u32m8(vuint32m8_t vd, vuint32m8_t vs2, uint32_t rs1, size_t vl) { in test_sf_vc_v_xvv_se_u32m8() argument
1437 return __riscv_sf_vc_v_xvv_se_u32m8(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_se_u32m8()
1450 vuint8mf8_t test_sf_vc_v_xvv_u8mf8(vuint8mf8_t vd, vuint8mf8_t vs2, uint8_t rs1, size_t vl) { in test_sf_vc_v_xvv_u8mf8() argument
1451 return __riscv_sf_vc_v_xvv_u8mf8(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_u8mf8()
1464 vuint8mf4_t test_sf_vc_v_xvv_u8mf4(vuint8mf4_t vd, vuint8mf4_t vs2, uint8_t rs1, size_t vl) { in test_sf_vc_v_xvv_u8mf4() argument
1465 return __riscv_sf_vc_v_xvv_u8mf4(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_u8mf4()
1478 vuint8mf2_t test_sf_vc_v_xvv_u8mf2(vuint8mf2_t vd, vuint8mf2_t vs2, uint8_t rs1, size_t vl) { in test_sf_vc_v_xvv_u8mf2() argument
1479 return __riscv_sf_vc_v_xvv_u8mf2(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_u8mf2()
1492 vuint8m1_t test_sf_vc_v_xvv_u8m1(vuint8m1_t vd, vuint8m1_t vs2, uint8_t rs1, size_t vl) { in test_sf_vc_v_xvv_u8m1() argument
1493 return __riscv_sf_vc_v_xvv_u8m1(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_u8m1()
1506 vuint8m2_t test_sf_vc_v_xvv_u8m2(vuint8m2_t vd, vuint8m2_t vs2, uint8_t rs1, size_t vl) { in test_sf_vc_v_xvv_u8m2() argument
1507 return __riscv_sf_vc_v_xvv_u8m2(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_u8m2()
1520 vuint8m4_t test_sf_vc_v_xvv_u8m4(vuint8m4_t vd, vuint8m4_t vs2, uint8_t rs1, size_t vl) { in test_sf_vc_v_xvv_u8m4() argument
1521 return __riscv_sf_vc_v_xvv_u8m4(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_u8m4()
1534 vuint8m8_t test_sf_vc_v_xvv_u8m8(vuint8m8_t vd, vuint8m8_t vs2, uint8_t rs1, size_t vl) { in test_sf_vc_v_xvv_u8m8() argument
1535 return __riscv_sf_vc_v_xvv_u8m8(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_u8m8()
1548 vuint16mf4_t test_sf_vc_v_xvv_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs2, uint16_t rs1, size_t vl) { in test_sf_vc_v_xvv_u16mf4() argument
1549 return __riscv_sf_vc_v_xvv_u16mf4(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_u16mf4()
1562 vuint16mf2_t test_sf_vc_v_xvv_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs2, uint16_t rs1, size_t vl) { in test_sf_vc_v_xvv_u16mf2() argument
1563 return __riscv_sf_vc_v_xvv_u16mf2(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_u16mf2()
1576 vuint16m1_t test_sf_vc_v_xvv_u16m1(vuint16m1_t vd, vuint16m1_t vs2, uint16_t rs1, size_t vl) { in test_sf_vc_v_xvv_u16m1() argument
1577 return __riscv_sf_vc_v_xvv_u16m1(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_u16m1()
1590 vuint16m2_t test_sf_vc_v_xvv_u16m2(vuint16m2_t vd, vuint16m2_t vs2, uint16_t rs1, size_t vl) { in test_sf_vc_v_xvv_u16m2() argument
1591 return __riscv_sf_vc_v_xvv_u16m2(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_u16m2()
1604 vuint16m4_t test_sf_vc_v_xvv_u16m4(vuint16m4_t vd, vuint16m4_t vs2, uint16_t rs1, size_t vl) { in test_sf_vc_v_xvv_u16m4() argument
1605 return __riscv_sf_vc_v_xvv_u16m4(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_u16m4()
1618 vuint16m8_t test_sf_vc_v_xvv_u16m8(vuint16m8_t vd, vuint16m8_t vs2, uint16_t rs1, size_t vl) { in test_sf_vc_v_xvv_u16m8() argument
1619 return __riscv_sf_vc_v_xvv_u16m8(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_u16m8()
1632 vuint32mf2_t test_sf_vc_v_xvv_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, uint32_t rs1, size_t vl) { in test_sf_vc_v_xvv_u32mf2() argument
1633 return __riscv_sf_vc_v_xvv_u32mf2(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_u32mf2()
1646 vuint32m1_t test_sf_vc_v_xvv_u32m1(vuint32m1_t vd, vuint32m1_t vs2, uint32_t rs1, size_t vl) { in test_sf_vc_v_xvv_u32m1() argument
1647 return __riscv_sf_vc_v_xvv_u32m1(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_u32m1()
1660 vuint32m2_t test_sf_vc_v_xvv_u32m2(vuint32m2_t vd, vuint32m2_t vs2, uint32_t rs1, size_t vl) { in test_sf_vc_v_xvv_u32m2() argument
1661 return __riscv_sf_vc_v_xvv_u32m2(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_u32m2()
1674 vuint32m4_t test_sf_vc_v_xvv_u32m4(vuint32m4_t vd, vuint32m4_t vs2, uint32_t rs1, size_t vl) { in test_sf_vc_v_xvv_u32m4() argument
1675 return __riscv_sf_vc_v_xvv_u32m4(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_u32m4()
1688 vuint32m8_t test_sf_vc_v_xvv_u32m8(vuint32m8_t vd, vuint32m8_t vs2, uint32_t rs1, size_t vl) { in test_sf_vc_v_xvv_u32m8() argument
1689 return __riscv_sf_vc_v_xvv_u32m8(p27_26, vd, vs2, rs1, vl); in test_sf_vc_v_xvv_u32m8()
1702 void test_sf_vc_ivv_se_u8mf8(vuint8mf8_t vd, vuint8mf8_t vs2, size_t vl) { in test_sf_vc_ivv_se_u8mf8() argument
1703 __riscv_sf_vc_ivv_se_u8mf8(p27_26, vd, vs2, simm5, vl); in test_sf_vc_ivv_se_u8mf8()
1716 void test_sf_vc_ivv_se_u8mf4(vuint8mf4_t vd, vuint8mf4_t vs2, size_t vl) { in test_sf_vc_ivv_se_u8mf4() argument
1717 __riscv_sf_vc_ivv_se_u8mf4(p27_26, vd, vs2, simm5, vl); in test_sf_vc_ivv_se_u8mf4()
1730 void test_sf_vc_ivv_se_u8mf2(vuint8mf2_t vd, vuint8mf2_t vs2, size_t vl) { in test_sf_vc_ivv_se_u8mf2() argument
1731 __riscv_sf_vc_ivv_se_u8mf2(p27_26, vd, vs2, simm5, vl); in test_sf_vc_ivv_se_u8mf2()
1744 void test_sf_vc_ivv_se_u8m1(vuint8m1_t vd, vuint8m1_t vs2, size_t vl) { in test_sf_vc_ivv_se_u8m1() argument
1745 __riscv_sf_vc_ivv_se_u8m1(p27_26, vd, vs2, simm5, vl); in test_sf_vc_ivv_se_u8m1()
1758 void test_sf_vc_ivv_se_u8m2(vuint8m2_t vd, vuint8m2_t vs2, size_t vl) { in test_sf_vc_ivv_se_u8m2() argument
1759 __riscv_sf_vc_ivv_se_u8m2(p27_26, vd, vs2, simm5, vl); in test_sf_vc_ivv_se_u8m2()
1772 void test_sf_vc_ivv_se_u8m4(vuint8m4_t vd, vuint8m4_t vs2, size_t vl) { in test_sf_vc_ivv_se_u8m4() argument
1773 __riscv_sf_vc_ivv_se_u8m4(p27_26, vd, vs2, simm5, vl); in test_sf_vc_ivv_se_u8m4()
1786 void test_sf_vc_ivv_se_u8m8(vuint8m8_t vd, vuint8m8_t vs2, size_t vl) { in test_sf_vc_ivv_se_u8m8() argument
1787 __riscv_sf_vc_ivv_se_u8m8(p27_26, vd, vs2, simm5, vl); in test_sf_vc_ivv_se_u8m8()
1800 void test_sf_vc_ivv_se_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs2, size_t vl) { in test_sf_vc_ivv_se_u16mf4() argument
1801 __riscv_sf_vc_ivv_se_u16mf4(p27_26, vd, vs2, simm5, vl); in test_sf_vc_ivv_se_u16mf4()
1814 void test_sf_vc_ivv_se_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs2, size_t vl) { in test_sf_vc_ivv_se_u16mf2() argument
1815 __riscv_sf_vc_ivv_se_u16mf2(p27_26, vd, vs2, simm5, vl); in test_sf_vc_ivv_se_u16mf2()
1828 void test_sf_vc_ivv_se_u16m1(vuint16m1_t vd, vuint16m1_t vs2, size_t vl) { in test_sf_vc_ivv_se_u16m1() argument
1829 __riscv_sf_vc_ivv_se_u16m1(p27_26, vd, vs2, simm5, vl); in test_sf_vc_ivv_se_u16m1()
1842 void test_sf_vc_ivv_se_u16m2(vuint16m2_t vd, vuint16m2_t vs2, size_t vl) { in test_sf_vc_ivv_se_u16m2() argument
1843 __riscv_sf_vc_ivv_se_u16m2(p27_26, vd, vs2, simm5, vl); in test_sf_vc_ivv_se_u16m2()
1856 void test_sf_vc_ivv_se_u16m4(vuint16m4_t vd, vuint16m4_t vs2, size_t vl) { in test_sf_vc_ivv_se_u16m4() argument
1857 __riscv_sf_vc_ivv_se_u16m4(p27_26, vd, vs2, simm5, vl); in test_sf_vc_ivv_se_u16m4()
1870 void test_sf_vc_ivv_se_u16m8(vuint16m8_t vd, vuint16m8_t vs2, size_t vl) { in test_sf_vc_ivv_se_u16m8() argument
1871 __riscv_sf_vc_ivv_se_u16m8(p27_26, vd, vs2, simm5, vl); in test_sf_vc_ivv_se_u16m8()
1884 void test_sf_vc_ivv_se_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, size_t vl) { in test_sf_vc_ivv_se_u32mf2() argument
1885 __riscv_sf_vc_ivv_se_u32mf2(p27_26, vd, vs2, simm5, vl); in test_sf_vc_ivv_se_u32mf2()
1898 void test_sf_vc_ivv_se_u32m1(vuint32m1_t vd, vuint32m1_t vs2, size_t vl) { in test_sf_vc_ivv_se_u32m1() argument
1899 __riscv_sf_vc_ivv_se_u32m1(p27_26, vd, vs2, simm5, vl); in test_sf_vc_ivv_se_u32m1()
1912 void test_sf_vc_ivv_se_u32m2(vuint32m2_t vd, vuint32m2_t vs2, size_t vl) { in test_sf_vc_ivv_se_u32m2() argument
1913 __riscv_sf_vc_ivv_se_u32m2(p27_26, vd, vs2, simm5, vl); in test_sf_vc_ivv_se_u32m2()
1926 void test_sf_vc_ivv_se_u32m4(vuint32m4_t vd, vuint32m4_t vs2, size_t vl) { in test_sf_vc_ivv_se_u32m4() argument
1927 __riscv_sf_vc_ivv_se_u32m4(p27_26, vd, vs2, simm5, vl); in test_sf_vc_ivv_se_u32m4()
1940 void test_sf_vc_ivv_se_u32m8(vuint32m8_t vd, vuint32m8_t vs2, size_t vl) { in test_sf_vc_ivv_se_u32m8() argument
1941 __riscv_sf_vc_ivv_se_u32m8(p27_26, vd, vs2, simm5, vl); in test_sf_vc_ivv_se_u32m8()
1954 void test_sf_vc_ivv_se_u64m1(vuint64m1_t vd, vuint64m1_t vs2, size_t vl) { in test_sf_vc_ivv_se_u64m1() argument
1955 __riscv_sf_vc_ivv_se_u64m1(p27_26, vd, vs2, simm5, vl); in test_sf_vc_ivv_se_u64m1()
1968 void test_sf_vc_ivv_se_u64m2(vuint64m2_t vd, vuint64m2_t vs2, size_t vl) { in test_sf_vc_ivv_se_u64m2() argument
1969 __riscv_sf_vc_ivv_se_u64m2(p27_26, vd, vs2, simm5, vl); in test_sf_vc_ivv_se_u64m2()
1982 void test_sf_vc_ivv_se_u64m4(vuint64m4_t vd, vuint64m4_t vs2, size_t vl) { in test_sf_vc_ivv_se_u64m4() argument
1983 __riscv_sf_vc_ivv_se_u64m4(p27_26, vd, vs2, simm5, vl); in test_sf_vc_ivv_se_u64m4()
1996 void test_sf_vc_ivv_se_u64m8(vuint64m8_t vd, vuint64m8_t vs2, size_t vl) { in test_sf_vc_ivv_se_u64m8() argument
1997 __riscv_sf_vc_ivv_se_u64m8(p27_26, vd, vs2, simm5, vl); in test_sf_vc_ivv_se_u64m8()
2010 vuint8mf8_t test_sf_vc_v_ivv_se_u8mf8(vuint8mf8_t vd, vuint8mf8_t vs2, size_t vl) { in test_sf_vc_v_ivv_se_u8mf8() argument
2011 return __riscv_sf_vc_v_ivv_se_u8mf8(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_se_u8mf8()
2024 vuint8mf4_t test_sf_vc_v_ivv_se_u8mf4(vuint8mf4_t vd, vuint8mf4_t vs2, size_t vl) { in test_sf_vc_v_ivv_se_u8mf4() argument
2025 return __riscv_sf_vc_v_ivv_se_u8mf4(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_se_u8mf4()
2038 vuint8mf2_t test_sf_vc_v_ivv_se_u8mf2(vuint8mf2_t vd, vuint8mf2_t vs2, size_t vl) { in test_sf_vc_v_ivv_se_u8mf2() argument
2039 return __riscv_sf_vc_v_ivv_se_u8mf2(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_se_u8mf2()
2052 vuint8m1_t test_sf_vc_v_ivv_se_u8m1(vuint8m1_t vd, vuint8m1_t vs2, size_t vl) { in test_sf_vc_v_ivv_se_u8m1() argument
2053 return __riscv_sf_vc_v_ivv_se_u8m1(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_se_u8m1()
2066 vuint8m2_t test_sf_vc_v_ivv_se_u8m2(vuint8m2_t vd, vuint8m2_t vs2, size_t vl) { in test_sf_vc_v_ivv_se_u8m2() argument
2067 return __riscv_sf_vc_v_ivv_se_u8m2(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_se_u8m2()
2080 vuint8m4_t test_sf_vc_v_ivv_se_u8m4(vuint8m4_t vd, vuint8m4_t vs2, size_t vl) { in test_sf_vc_v_ivv_se_u8m4() argument
2081 return __riscv_sf_vc_v_ivv_se_u8m4(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_se_u8m4()
2094 vuint8m8_t test_sf_vc_v_ivv_se_u8m8(vuint8m8_t vd, vuint8m8_t vs2, size_t vl) { in test_sf_vc_v_ivv_se_u8m8() argument
2095 return __riscv_sf_vc_v_ivv_se_u8m8(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_se_u8m8()
2108 vuint16mf4_t test_sf_vc_v_ivv_se_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs2, size_t vl) { in test_sf_vc_v_ivv_se_u16mf4() argument
2109 return __riscv_sf_vc_v_ivv_se_u16mf4(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_se_u16mf4()
2122 vuint16mf2_t test_sf_vc_v_ivv_se_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs2, size_t vl) { in test_sf_vc_v_ivv_se_u16mf2() argument
2123 return __riscv_sf_vc_v_ivv_se_u16mf2(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_se_u16mf2()
2136 vuint16m1_t test_sf_vc_v_ivv_se_u16m1(vuint16m1_t vd, vuint16m1_t vs2, size_t vl) { in test_sf_vc_v_ivv_se_u16m1() argument
2137 return __riscv_sf_vc_v_ivv_se_u16m1(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_se_u16m1()
2150 vuint16m2_t test_sf_vc_v_ivv_se_u16m2(vuint16m2_t vd, vuint16m2_t vs2, size_t vl) { in test_sf_vc_v_ivv_se_u16m2() argument
2151 return __riscv_sf_vc_v_ivv_se_u16m2(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_se_u16m2()
2164 vuint16m4_t test_sf_vc_v_ivv_se_u16m4(vuint16m4_t vd, vuint16m4_t vs2, size_t vl) { in test_sf_vc_v_ivv_se_u16m4() argument
2165 return __riscv_sf_vc_v_ivv_se_u16m4(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_se_u16m4()
2178 vuint16m8_t test_sf_vc_v_ivv_se_u16m8(vuint16m8_t vd, vuint16m8_t vs2, size_t vl) { in test_sf_vc_v_ivv_se_u16m8() argument
2179 return __riscv_sf_vc_v_ivv_se_u16m8(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_se_u16m8()
2192 vuint32mf2_t test_sf_vc_v_ivv_se_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, size_t vl) { in test_sf_vc_v_ivv_se_u32mf2() argument
2193 return __riscv_sf_vc_v_ivv_se_u32mf2(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_se_u32mf2()
2206 vuint32m1_t test_sf_vc_v_ivv_se_u32m1(vuint32m1_t vd, vuint32m1_t vs2, size_t vl) { in test_sf_vc_v_ivv_se_u32m1() argument
2207 return __riscv_sf_vc_v_ivv_se_u32m1(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_se_u32m1()
2220 vuint32m2_t test_sf_vc_v_ivv_se_u32m2(vuint32m2_t vd, vuint32m2_t vs2, size_t vl) { in test_sf_vc_v_ivv_se_u32m2() argument
2221 return __riscv_sf_vc_v_ivv_se_u32m2(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_se_u32m2()
2234 vuint32m4_t test_sf_vc_v_ivv_se_u32m4(vuint32m4_t vd, vuint32m4_t vs2, size_t vl) { in test_sf_vc_v_ivv_se_u32m4() argument
2235 return __riscv_sf_vc_v_ivv_se_u32m4(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_se_u32m4()
2248 vuint32m8_t test_sf_vc_v_ivv_se_u32m8(vuint32m8_t vd, vuint32m8_t vs2, size_t vl) { in test_sf_vc_v_ivv_se_u32m8() argument
2249 return __riscv_sf_vc_v_ivv_se_u32m8(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_se_u32m8()
2262 vuint64m1_t test_sf_vc_v_ivv_se_u64m1(vuint64m1_t vd, vuint64m1_t vs2, size_t vl) { in test_sf_vc_v_ivv_se_u64m1() argument
2263 return __riscv_sf_vc_v_ivv_se_u64m1(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_se_u64m1()
2276 vuint64m2_t test_sf_vc_v_ivv_se_u64m2(vuint64m2_t vd, vuint64m2_t vs2, size_t vl) { in test_sf_vc_v_ivv_se_u64m2() argument
2277 return __riscv_sf_vc_v_ivv_se_u64m2(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_se_u64m2()
2290 vuint64m4_t test_sf_vc_v_ivv_se_u64m4(vuint64m4_t vd, vuint64m4_t vs2, size_t vl) { in test_sf_vc_v_ivv_se_u64m4() argument
2291 return __riscv_sf_vc_v_ivv_se_u64m4(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_se_u64m4()
2304 vuint64m8_t test_sf_vc_v_ivv_se_u64m8(vuint64m8_t vd, vuint64m8_t vs2, size_t vl) { in test_sf_vc_v_ivv_se_u64m8() argument
2305 return __riscv_sf_vc_v_ivv_se_u64m8(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_se_u64m8()
2318 vuint8mf8_t test_sf_vc_v_ivv_u8mf8(vuint8mf8_t vd, vuint8mf8_t vs2, size_t vl) { in test_sf_vc_v_ivv_u8mf8() argument
2319 return __riscv_sf_vc_v_ivv_u8mf8(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_u8mf8()
2332 vuint8mf4_t test_sf_vc_v_ivv_u8mf4(vuint8mf4_t vd, vuint8mf4_t vs2, size_t vl) { in test_sf_vc_v_ivv_u8mf4() argument
2333 return __riscv_sf_vc_v_ivv_u8mf4(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_u8mf4()
2346 vuint8mf2_t test_sf_vc_v_ivv_u8mf2(vuint8mf2_t vd, vuint8mf2_t vs2, size_t vl) { in test_sf_vc_v_ivv_u8mf2() argument
2347 return __riscv_sf_vc_v_ivv_u8mf2(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_u8mf2()
2360 vuint8m1_t test_sf_vc_v_ivv_u8m1(vuint8m1_t vd, vuint8m1_t vs2, size_t vl) { in test_sf_vc_v_ivv_u8m1() argument
2361 return __riscv_sf_vc_v_ivv_u8m1(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_u8m1()
2374 vuint8m2_t test_sf_vc_v_ivv_u8m2(vuint8m2_t vd, vuint8m2_t vs2, size_t vl) { in test_sf_vc_v_ivv_u8m2() argument
2375 return __riscv_sf_vc_v_ivv_u8m2(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_u8m2()
2388 vuint8m4_t test_sf_vc_v_ivv_u8m4(vuint8m4_t vd, vuint8m4_t vs2, size_t vl) { in test_sf_vc_v_ivv_u8m4() argument
2389 return __riscv_sf_vc_v_ivv_u8m4(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_u8m4()
2402 vuint8m8_t test_sf_vc_v_ivv_u8m8(vuint8m8_t vd, vuint8m8_t vs2, size_t vl) { in test_sf_vc_v_ivv_u8m8() argument
2403 return __riscv_sf_vc_v_ivv_u8m8(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_u8m8()
2416 vuint16mf4_t test_sf_vc_v_ivv_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs2, size_t vl) { in test_sf_vc_v_ivv_u16mf4() argument
2417 return __riscv_sf_vc_v_ivv_u16mf4(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_u16mf4()
2430 vuint16mf2_t test_sf_vc_v_ivv_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs2, size_t vl) { in test_sf_vc_v_ivv_u16mf2() argument
2431 return __riscv_sf_vc_v_ivv_u16mf2(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_u16mf2()
2444 vuint16m1_t test_sf_vc_v_ivv_u16m1(vuint16m1_t vd, vuint16m1_t vs2, size_t vl) { in test_sf_vc_v_ivv_u16m1() argument
2445 return __riscv_sf_vc_v_ivv_u16m1(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_u16m1()
2458 vuint16m2_t test_sf_vc_v_ivv_u16m2(vuint16m2_t vd, vuint16m2_t vs2, size_t vl) { in test_sf_vc_v_ivv_u16m2() argument
2459 return __riscv_sf_vc_v_ivv_u16m2(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_u16m2()
2472 vuint16m4_t test_sf_vc_v_ivv_u16m4(vuint16m4_t vd, vuint16m4_t vs2, size_t vl) { in test_sf_vc_v_ivv_u16m4() argument
2473 return __riscv_sf_vc_v_ivv_u16m4(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_u16m4()
2486 vuint16m8_t test_sf_vc_v_ivv_u16m8(vuint16m8_t vd, vuint16m8_t vs2, size_t vl) { in test_sf_vc_v_ivv_u16m8() argument
2487 return __riscv_sf_vc_v_ivv_u16m8(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_u16m8()
2500 vuint32mf2_t test_sf_vc_v_ivv_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, size_t vl) { in test_sf_vc_v_ivv_u32mf2() argument
2501 return __riscv_sf_vc_v_ivv_u32mf2(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_u32mf2()
2514 vuint32m1_t test_sf_vc_v_ivv_u32m1(vuint32m1_t vd, vuint32m1_t vs2, size_t vl) { in test_sf_vc_v_ivv_u32m1() argument
2515 return __riscv_sf_vc_v_ivv_u32m1(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_u32m1()
2528 vuint32m2_t test_sf_vc_v_ivv_u32m2(vuint32m2_t vd, vuint32m2_t vs2, size_t vl) { in test_sf_vc_v_ivv_u32m2() argument
2529 return __riscv_sf_vc_v_ivv_u32m2(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_u32m2()
2542 vuint32m4_t test_sf_vc_v_ivv_u32m4(vuint32m4_t vd, vuint32m4_t vs2, size_t vl) { in test_sf_vc_v_ivv_u32m4() argument
2543 return __riscv_sf_vc_v_ivv_u32m4(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_u32m4()
2556 vuint32m8_t test_sf_vc_v_ivv_u32m8(vuint32m8_t vd, vuint32m8_t vs2, size_t vl) { in test_sf_vc_v_ivv_u32m8() argument
2557 return __riscv_sf_vc_v_ivv_u32m8(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_u32m8()
2570 vuint64m1_t test_sf_vc_v_ivv_u64m1(vuint64m1_t vd, vuint64m1_t vs2, size_t vl) { in test_sf_vc_v_ivv_u64m1() argument
2571 return __riscv_sf_vc_v_ivv_u64m1(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_u64m1()
2584 vuint64m2_t test_sf_vc_v_ivv_u64m2(vuint64m2_t vd, vuint64m2_t vs2, size_t vl) { in test_sf_vc_v_ivv_u64m2() argument
2585 return __riscv_sf_vc_v_ivv_u64m2(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_u64m2()
2598 vuint64m4_t test_sf_vc_v_ivv_u64m4(vuint64m4_t vd, vuint64m4_t vs2, size_t vl) { in test_sf_vc_v_ivv_u64m4() argument
2599 return __riscv_sf_vc_v_ivv_u64m4(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_u64m4()
2612 vuint64m8_t test_sf_vc_v_ivv_u64m8(vuint64m8_t vd, vuint64m8_t vs2, size_t vl) { in test_sf_vc_v_ivv_u64m8() argument
2613 return __riscv_sf_vc_v_ivv_u64m8(p27_26, vd, vs2, simm5, vl); in test_sf_vc_v_ivv_u64m8()
2626 void test_sf_vc_fvv_se_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs2, _Float16 fs1, size_t vl) { in test_sf_vc_fvv_se_u16mf4() argument
2627 __riscv_sf_vc_fvv_se_u16mf4(p26, vd, vs2, fs1, vl); in test_sf_vc_fvv_se_u16mf4()
2640 void test_sf_vc_fvv_se_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs2, _Float16 fs1, size_t vl) { in test_sf_vc_fvv_se_u16mf2() argument
2641 __riscv_sf_vc_fvv_se_u16mf2(p26, vd, vs2, fs1, vl); in test_sf_vc_fvv_se_u16mf2()
2654 void test_sf_vc_fvv_se_u16m1(vuint16m1_t vd, vuint16m1_t vs2, _Float16 fs1, size_t vl) { in test_sf_vc_fvv_se_u16m1() argument
2655 __riscv_sf_vc_fvv_se_u16m1(p26, vd, vs2, fs1, vl); in test_sf_vc_fvv_se_u16m1()
2668 void test_sf_vc_fvv_se_u16m2(vuint16m2_t vd, vuint16m2_t vs2, _Float16 fs1, size_t vl) { in test_sf_vc_fvv_se_u16m2() argument
2669 __riscv_sf_vc_fvv_se_u16m2(p26, vd, vs2, fs1, vl); in test_sf_vc_fvv_se_u16m2()
2682 void test_sf_vc_fvv_se_u16m4(vuint16m4_t vd, vuint16m4_t vs2, _Float16 fs1, size_t vl) { in test_sf_vc_fvv_se_u16m4() argument
2683 __riscv_sf_vc_fvv_se_u16m4(p26, vd, vs2, fs1, vl); in test_sf_vc_fvv_se_u16m4()
2696 void test_sf_vc_fvv_se_u16m8(vuint16m8_t vd, vuint16m8_t vs2, _Float16 fs1, size_t vl) { in test_sf_vc_fvv_se_u16m8() argument
2697 __riscv_sf_vc_fvv_se_u16m8(p26, vd, vs2, fs1, vl); in test_sf_vc_fvv_se_u16m8()
2710 void test_sf_vc_fvv_se_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, float fs1, size_t vl) { in test_sf_vc_fvv_se_u32mf2() argument
2711 __riscv_sf_vc_fvv_se_u32mf2(p26, vd, vs2, fs1, vl); in test_sf_vc_fvv_se_u32mf2()
2724 void test_sf_vc_fvv_se_u32m1(vuint32m1_t vd, vuint32m1_t vs2, float fs1, size_t vl) { in test_sf_vc_fvv_se_u32m1() argument
2725 __riscv_sf_vc_fvv_se_u32m1(p26, vd, vs2, fs1, vl); in test_sf_vc_fvv_se_u32m1()
2738 void test_sf_vc_fvv_se_u32m2(vuint32m2_t vd, vuint32m2_t vs2, float fs1, size_t vl) { in test_sf_vc_fvv_se_u32m2() argument
2739 __riscv_sf_vc_fvv_se_u32m2(p26, vd, vs2, fs1, vl); in test_sf_vc_fvv_se_u32m2()
2752 void test_sf_vc_fvv_se_u32m4(vuint32m4_t vd, vuint32m4_t vs2, float fs1, size_t vl) { in test_sf_vc_fvv_se_u32m4() argument
2753 __riscv_sf_vc_fvv_se_u32m4(p26, vd, vs2, fs1, vl); in test_sf_vc_fvv_se_u32m4()
2766 void test_sf_vc_fvv_se_u32m8(vuint32m8_t vd, vuint32m8_t vs2, float fs1, size_t vl) { in test_sf_vc_fvv_se_u32m8() argument
2767 __riscv_sf_vc_fvv_se_u32m8(p26, vd, vs2, fs1, vl); in test_sf_vc_fvv_se_u32m8()
2780 void test_sf_vc_fvv_se_u64m1(vuint64m1_t vd, vuint64m1_t vs2, double fs1, size_t vl) { in test_sf_vc_fvv_se_u64m1() argument
2781 __riscv_sf_vc_fvv_se_u64m1(p26, vd, vs2, fs1, vl); in test_sf_vc_fvv_se_u64m1()
2794 void test_sf_vc_fvv_se_u64m2(vuint64m2_t vd, vuint64m2_t vs2, double fs1, size_t vl) { in test_sf_vc_fvv_se_u64m2() argument
2795 __riscv_sf_vc_fvv_se_u64m2(p26, vd, vs2, fs1, vl); in test_sf_vc_fvv_se_u64m2()
2808 void test_sf_vc_fvv_se_u64m4(vuint64m4_t vd, vuint64m4_t vs2, double fs1, size_t vl) { in test_sf_vc_fvv_se_u64m4() argument
2809 __riscv_sf_vc_fvv_se_u64m4(p26, vd, vs2, fs1, vl); in test_sf_vc_fvv_se_u64m4()
2822 void test_sf_vc_fvv_se_u64m8(vuint64m8_t vd, vuint64m8_t vs2, double fs1, size_t vl) { in test_sf_vc_fvv_se_u64m8() argument
2823 __riscv_sf_vc_fvv_se_u64m8(p26, vd, vs2, fs1, vl); in test_sf_vc_fvv_se_u64m8()
2836 vuint16mf4_t test_sf_vc_v_fvv_se_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs2, _Float16 fs1, size_t vl)… in test_sf_vc_v_fvv_se_u16mf4() argument
2837 return __riscv_sf_vc_v_fvv_se_u16mf4(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_se_u16mf4()
2850 vuint16mf2_t test_sf_vc_v_fvv_se_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs2, _Float16 fs1, size_t vl)… in test_sf_vc_v_fvv_se_u16mf2() argument
2851 return __riscv_sf_vc_v_fvv_se_u16mf2(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_se_u16mf2()
2864 vuint16m1_t test_sf_vc_v_fvv_se_u16m1(vuint16m1_t vd, vuint16m1_t vs2, _Float16 fs1, size_t vl) { in test_sf_vc_v_fvv_se_u16m1() argument
2865 return __riscv_sf_vc_v_fvv_se_u16m1(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_se_u16m1()
2878 vuint16m2_t test_sf_vc_v_fvv_se_u16m2(vuint16m2_t vd, vuint16m2_t vs2, _Float16 fs1, size_t vl) { in test_sf_vc_v_fvv_se_u16m2() argument
2879 return __riscv_sf_vc_v_fvv_se_u16m2(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_se_u16m2()
2892 vuint16m4_t test_sf_vc_v_fvv_se_u16m4(vuint16m4_t vd, vuint16m4_t vs2, _Float16 fs1, size_t vl) { in test_sf_vc_v_fvv_se_u16m4() argument
2893 return __riscv_sf_vc_v_fvv_se_u16m4(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_se_u16m4()
2906 vuint16m8_t test_sf_vc_v_fvv_se_u16m8(vuint16m8_t vd, vuint16m8_t vs2, _Float16 fs1, size_t vl) { in test_sf_vc_v_fvv_se_u16m8() argument
2907 return __riscv_sf_vc_v_fvv_se_u16m8(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_se_u16m8()
2920 vuint32mf2_t test_sf_vc_v_fvv_se_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, float fs1, size_t vl) { in test_sf_vc_v_fvv_se_u32mf2() argument
2921 return __riscv_sf_vc_v_fvv_se_u32mf2(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_se_u32mf2()
2934 vuint32m1_t test_sf_vc_v_fvv_se_u32m1(vuint32m1_t vd, vuint32m1_t vs2, float fs1, size_t vl) { in test_sf_vc_v_fvv_se_u32m1() argument
2935 return __riscv_sf_vc_v_fvv_se_u32m1(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_se_u32m1()
2948 vuint32m2_t test_sf_vc_v_fvv_se_u32m2(vuint32m2_t vd, vuint32m2_t vs2, float fs1, size_t vl) { in test_sf_vc_v_fvv_se_u32m2() argument
2949 return __riscv_sf_vc_v_fvv_se_u32m2(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_se_u32m2()
2962 vuint32m4_t test_sf_vc_v_fvv_se_u32m4(vuint32m4_t vd, vuint32m4_t vs2, float fs1, size_t vl) { in test_sf_vc_v_fvv_se_u32m4() argument
2963 return __riscv_sf_vc_v_fvv_se_u32m4(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_se_u32m4()
2976 vuint32m8_t test_sf_vc_v_fvv_se_u32m8(vuint32m8_t vd, vuint32m8_t vs2, float fs1, size_t vl) { in test_sf_vc_v_fvv_se_u32m8() argument
2977 return __riscv_sf_vc_v_fvv_se_u32m8(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_se_u32m8()
2990 vuint64m1_t test_sf_vc_v_fvv_se_u64m1(vuint64m1_t vd, vuint64m1_t vs2, double fs1, size_t vl) { in test_sf_vc_v_fvv_se_u64m1() argument
2991 return __riscv_sf_vc_v_fvv_se_u64m1(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_se_u64m1()
3004 vuint64m2_t test_sf_vc_v_fvv_se_u64m2(vuint64m2_t vd, vuint64m2_t vs2, double fs1, size_t vl) { in test_sf_vc_v_fvv_se_u64m2() argument
3005 return __riscv_sf_vc_v_fvv_se_u64m2(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_se_u64m2()
3018 vuint64m4_t test_sf_vc_v_fvv_se_u64m4(vuint64m4_t vd, vuint64m4_t vs2, double fs1, size_t vl) { in test_sf_vc_v_fvv_se_u64m4() argument
3019 return __riscv_sf_vc_v_fvv_se_u64m4(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_se_u64m4()
3032 vuint64m8_t test_sf_vc_v_fvv_se_u64m8(vuint64m8_t vd, vuint64m8_t vs2, double fs1, size_t vl) { in test_sf_vc_v_fvv_se_u64m8() argument
3033 return __riscv_sf_vc_v_fvv_se_u64m8(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_se_u64m8()
3046 vuint16mf4_t test_sf_vc_v_fvv_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs2, _Float16 fs1, size_t vl) { in test_sf_vc_v_fvv_u16mf4() argument
3047 return __riscv_sf_vc_v_fvv_u16mf4(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_u16mf4()
3060 vuint16mf2_t test_sf_vc_v_fvv_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs2, _Float16 fs1, size_t vl) { in test_sf_vc_v_fvv_u16mf2() argument
3061 return __riscv_sf_vc_v_fvv_u16mf2(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_u16mf2()
3074 vuint16m1_t test_sf_vc_v_fvv_u16m1(vuint16m1_t vd, vuint16m1_t vs2, _Float16 fs1, size_t vl) { in test_sf_vc_v_fvv_u16m1() argument
3075 return __riscv_sf_vc_v_fvv_u16m1(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_u16m1()
3088 vuint16m2_t test_sf_vc_v_fvv_u16m2(vuint16m2_t vd, vuint16m2_t vs2, _Float16 fs1, size_t vl) { in test_sf_vc_v_fvv_u16m2() argument
3089 return __riscv_sf_vc_v_fvv_u16m2(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_u16m2()
3102 vuint16m4_t test_sf_vc_v_fvv_u16m4(vuint16m4_t vd, vuint16m4_t vs2, _Float16 fs1, size_t vl) { in test_sf_vc_v_fvv_u16m4() argument
3103 return __riscv_sf_vc_v_fvv_u16m4(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_u16m4()
3116 vuint16m8_t test_sf_vc_v_fvv_u16m8(vuint16m8_t vd, vuint16m8_t vs2, _Float16 fs1, size_t vl) { in test_sf_vc_v_fvv_u16m8() argument
3117 return __riscv_sf_vc_v_fvv_u16m8(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_u16m8()
3130 vuint32mf2_t test_sf_vc_v_fvv_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, float fs1, size_t vl) { in test_sf_vc_v_fvv_u32mf2() argument
3131 return __riscv_sf_vc_v_fvv_u32mf2(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_u32mf2()
3144 vuint32m1_t test_sf_vc_v_fvv_u32m1(vuint32m1_t vd, vuint32m1_t vs2, float fs1, size_t vl) { in test_sf_vc_v_fvv_u32m1() argument
3145 return __riscv_sf_vc_v_fvv_u32m1(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_u32m1()
3158 vuint32m2_t test_sf_vc_v_fvv_u32m2(vuint32m2_t vd, vuint32m2_t vs2, float fs1, size_t vl) { in test_sf_vc_v_fvv_u32m2() argument
3159 return __riscv_sf_vc_v_fvv_u32m2(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_u32m2()
3172 vuint32m4_t test_sf_vc_v_fvv_u32m4(vuint32m4_t vd, vuint32m4_t vs2, float fs1, size_t vl) { in test_sf_vc_v_fvv_u32m4() argument
3173 return __riscv_sf_vc_v_fvv_u32m4(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_u32m4()
3186 vuint32m8_t test_sf_vc_v_fvv_u32m8(vuint32m8_t vd, vuint32m8_t vs2, float fs1, size_t vl) { in test_sf_vc_v_fvv_u32m8() argument
3187 return __riscv_sf_vc_v_fvv_u32m8(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_u32m8()
3200 vuint64m1_t test_sf_vc_v_fvv_u64m1(vuint64m1_t vd, vuint64m1_t vs2, double fs1, size_t vl) { in test_sf_vc_v_fvv_u64m1() argument
3201 return __riscv_sf_vc_v_fvv_u64m1(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_u64m1()
3214 vuint64m2_t test_sf_vc_v_fvv_u64m2(vuint64m2_t vd, vuint64m2_t vs2, double fs1, size_t vl) { in test_sf_vc_v_fvv_u64m2() argument
3215 return __riscv_sf_vc_v_fvv_u64m2(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_u64m2()
3228 vuint64m4_t test_sf_vc_v_fvv_u64m4(vuint64m4_t vd, vuint64m4_t vs2, double fs1, size_t vl) { in test_sf_vc_v_fvv_u64m4() argument
3229 return __riscv_sf_vc_v_fvv_u64m4(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_u64m4()
3242 vuint64m8_t test_sf_vc_v_fvv_u64m8(vuint64m8_t vd, vuint64m8_t vs2, double fs1, size_t vl) { in test_sf_vc_v_fvv_u64m8() argument
3243 return __riscv_sf_vc_v_fvv_u64m8(p26, vd, vs2, fs1, vl); in test_sf_vc_v_fvv_u64m8()