Lines Matching defs:i64

37 long long i64;
70 // CHECK-LABEL: define available_externally i64 @_mm_avg_pu16
71 // CHECK: call <2 x i64> @vec_splats(unsigned long long)
72 // CHECK: call <2 x i64> @vec_splats(unsigned long long)
74 // CHECK: extractelement <2 x i64> %{{[0-9a-zA-Z_.]+}}, i32 0
76 // CHECK-LABEL: define available_externally i64 @_mm_avg_pu8
77 // CHECK: call <2 x i64> @vec_splats(unsigned long long)
78 // CHECK: call <2 x i64> @vec_splats(unsigned long long)
80 // CHECK: extractelement <2 x i64> %{{[0-9a-zA-Z_.]+}}, i32 0
90 // CHECK-LABEL: define available_externally i64 @_m_pavgw
91 // CHECK: call i64 @_mm_avg_pu16
93 // CHECK-LABEL: define available_externally i64 @_m_pavgb
94 // CHECK: call i64 @_mm_avg_pu8
312   res = _mm_cvtsi64_ss(m1, i64);
315   i64 = _mm_cvtss_si64(m1);
320   i64 = _mm_cvttss_si64(m1);
328 // CHECK-LABEL: define available_externally i64 @_mm_cvt_ps2pi
329 // CHECK: call i64 @_mm_cvtps_pi32
352 // CHECK-LABEL: define available_externally i64 @_mm_cvtps_pi16
356 // CHECK: extractelement <2 x i64> %{{[0-9a-zA-Z_.]+}}, i32 0
358 // CHECK-LABEL: define available_externally i64 @_mm_cvtps_pi32
359 // CHECK: call <2 x i64> @vec_splat(long long vector[2], unsigned int)(<2 x i64> noundef %{{[0-9a-zA-Z_.]+}}, i32 noundef zeroext 0)
362 // CHECK: extractelement <2 x i64> %{{[0-9a-zA-Z_.]+}}, i32 0
364 // CHECK-LABEL: define available_externally i64 @_mm_cvtps_pi8
369 // CHECK: extractelement <2 x i64> %{{[0-9a-zA-Z_.]+}}, i32 0
388 // CHECK: sitofp i64 %{{[0-9a-zA-Z_.]+}} to float
403 // CHECK-LABEL: define available_externally i64 @_mm_cvtss_si64
404 // CHECK-LE: %[[VEC:[0-9a-zA-Z_.]+]] = call { <4 x float>, i64, double } asm "xxsldwi ${0:x},${0:x},${0:x},3;\0Axscvspdp ${2:x},${0:x};\0Afctid  $2,$2;\0Amfvsrd  $1,${2:x};\0A", "=^wa,=r,=f,0"
405 // CHECK-BE: %[[VEC:[0-9a-zA-Z_.]+]] = call { <4 x float>, i64, double } asm "xscvspdp ${2:x},${0:x};\0Afctid  $2,$2;\0Amfvsrd  $1,${2:x};\0A", "=^wa,=r,=f,0"
406 // CHECK: extractvalue { <4 x float>, i64, double } %[[VEC]], 0
407 // CHECK: extractvalue { <4 x float>, i64, double } %[[VEC]], 1
408 // CHECK: extractvalue { <4 x float>, i64, double } %[[VEC]], 2
410 // CHECK-LABEL: define available_externally i64 @_mm_cvtt_ps2pi
411 // CHECK: call i64 @_mm_cvttps_pi32(<4 x float> noundef %{{[0-9a-zA-Z_.]+}})
416 // CHECK-LABEL: define available_externally i64 @_mm_cvttps_pi32
417 // CHECK: call <2 x i64> @vec_splat(long long vector[2], unsigned int)(<2 x i64> noundef %{{[0-9a-zA-Z_.]+}}, i32 noundef zeroext 0)
419 // CHECK: extractelement <2 x i64> %{{[0-9a-zA-Z_.]+}}, i32 0
425 // CHECK-LABEL: define available_externally i64 @_mm_cvttss_si64
427 // CHECK: fptosi float %{{[0-9a-zA-Z_.]+}} to i64
458 // CHECK: %[[EXT:[0-9a-zA-Z_.]+]] = zext i32 %[[MUL]] to i64
459 // CHECK: %[[SHR:[0-9a-zA-Z_.]+]] = lshr i64 %{{[0-9a-zA-Z_.]+}}, %[[EXT]]
460 // CHECK: %[[AND:[0-9a-zA-Z_.]+]] = and i64 %[[SHR]], 65535
461 // CHECK: trunc i64 %[[AND]] to i32
474 // CHECK-LABEL: define available_externally i64 @_mm_insert_pi16
477 // CHECK: %[[EXT:[0-9a-zA-Z_.]+]] = sext i32 %{{[0-9a-zA-Z_.]+}} to i64
478 // CHECK: %[[EXT2:[0-9a-zA-Z_.]+]] = zext i32 %{{[0-9a-zA-Z_.]+}} to i64
479 // CHECK: shl i64 %[[EXT]], %[[EXT2]]
480 // CHECK: %[[EXT3:[0-9a-zA-Z_.]+]] = zext i32 %{{[0-9a-zA-Z_.]+}} to i64
481 // CHECK: shl i64 65535, %[[EXT3]]
482 // CHECK: %[[XOR:[0-9a-zA-Z_.]+]] = xor i64 %{{[0-9a-zA-Z_.]+}}, -1
483 // CHECK: %[[AND2:[0-9a-zA-Z_.]+]] = and i64 %{{[0-9a-zA-Z_.]+}}, %[[XOR]]
484 // CHECK: %[[AND3:[0-9a-zA-Z_.]+]] = and i64 %{{[0-9a-zA-Z_.]+}}, %{{[0-9a-zA-Z_.]+}}
485 // CHECK: or i64 %[[AND2]], %[[AND3]]
487 // CHECK-LABEL: define available_externally i64 @_m_pinsrw
488 // CHECK: call i64 @_mm_insert_pi16
517 // CHECK: call <2 x i64> @vec_splats(unsigned long long)
518 // CHECK: %[[VAL:[0-9a-zA-Z_.]+]] = extractelement <2 x i64> %{{[0-9a-zA-Z_.]+}}, i32 1
519 // CHECK: insertelement <2 x i64> %{{[0-9a-zA-Z_.]+}}, i64 %[[VAL]], i32 1
522 // CHECK: call <2 x i64> @vec_splats(unsigned long long)
523 // CHECK: %[[EXT:[0-9a-zA-Z_.]+]] = extractelement <2 x i64> %{{[0-9a-zA-Z_.]+}}, i32 0
524 // CHECK: insertelement <2 x i64> %{{[0-9a-zA-Z_.]+}}, i64 %[[EXT]], i32 0
575 // CHECK-LABEL: define available_externally i64 @_mm_max_pi16
576 // CHECK: call <2 x i64> @vec_splats(unsigned long long)
577 // CHECK: call <2 x i64> @vec_splats(unsigned long long)
580 // CHECK: %[[CAST:[0-9a-zA-Z_.]+]] = bitcast <8 x i16> %{{[0-9a-zA-Z_.]+}} to <2 x i64>
581 // CHECK: extractelement <2 x i64> %[[CAST]], i32 0
583 // CHECK-LABEL: define available_externally i64 @_mm_max_pu8
584 // CHECK: call <2 x i64> @vec_splats(unsigned long long)
585 // CHECK: call <2 x i64> @vec_splats(unsigned long long)
588 // CHECK: %[[CAST:[0-9a-zA-Z_.]+]] = bitcast <16 x i8> %{{[0-9a-zA-Z_.]+}} to <2 x i64>
589 // CHECK: extractelement <2 x i64> %[[CAST]], i32 0
599 // CHECK-LABEL: define available_externally i64 @_m_pmaxsw
600 // CHECK: call i64 @_mm_max_pi16
602 // CHECK-LABEL: define available_externally i64 @_m_pmaxub
603 // CHECK: call i64 @_mm_max_pu8
625 // CHECK-LABEL: define available_externally i64 @_mm_min_pi16
626 // CHECK: call <2 x i64> @vec_splats(unsigned long long)
627 // CHECK: call <2 x i64> @vec_splats(unsigned long long)
630 // CHECK: %[[CAST:[0-9a-zA-Z_.]+]] = bitcast <8 x i16> %{{[0-9a-zA-Z_.]+}} to <2 x i64>
631 // CHECK: extractelement <2 x i64> %[[CAST]], i32 0
633 // CHECK-LABEL: define available_externally i64 @_mm_min_pu8
634 // CHECK: call <2 x i64> @vec_splats(unsigned long long)
635 // CHECK: call <2 x i64> @vec_splats(unsigned long long)
638 // CHECK: %[[CAST:[0-9a-zA-Z_.]+]] = bitcast <16 x i8> %{{[0-9a-zA-Z_.]+}} to <2 x i64>
639 // CHECK: extractelement <2 x i64> %[[CAST]], i32 0
649 // CHECK-LABEL: define available_externally i64 @_m_pminsw
650 // CHECK: call i64 @_mm_min_pi16
652 // CHECK-LABEL: define available_externally i64 @_m_pminub
653 // CHECK: call i64 @_mm_min_pu8
668 // CHECK: store i64 -9187201950435737472, ptr %{{[0-9a-zA-Z_.]+}}, align 8
669 // CHECK: %[[AND:[0-9a-zA-Z_.]+]] = and i64
670 // CHECK: call i64 @_mm_cmpeq_pi8(i64 noundef %[[AND]], i64 noundef %{{[0-9a-zA-Z_.]+}})
671 // CHECK: %[[XOR:[0-9a-zA-Z_.]+]] = xor i64 %{{[0-9a-zA-Z_.]+}}, -1
672 // CHECK: %[[AND2:[0-9a-zA-Z_.]+]] = and i64 %{{[0-9a-zA-Z_.]+}}, %[[XOR]]
673 // CHECK: %[[AND3:[0-9a-zA-Z_.]+]] = and i64
674 // CHECK: or i64 %[[AND2]], %[[AND3]]
680 // CHECK: call <2 x i64> @vec_mergel(unsigned long long vector[2], unsigned long long vector[2])
683 // CHECK: call <2 x i64> @vec_mergeh(unsigned long long vector[2], unsigned long long vector[2])
686 // CHECK-LE: store i64 2269495618449464, ptr %{{[0-9a-zA-Z_.]+}}, align 8
687 // CHECK-BE: store i64 4048780183313844224, ptr %{{[0-9a-zA-Z_.]+}}, align 8
688 // CHECK: %[[CALL:[0-9a-zA-Z_.]+]] = call i64 @llvm.ppc.bpermd
689 // CHECK: trunc i64 %[[CALL]] to i32
692 // CHECK-LE: call <2 x i64> @vec_vbpermq(unsigned char vector[16], unsigned char vector[16])(<16 x i8> noundef %{{[0-9a-zA-Z_.]+}}, <16 x i8> noundef bitcast (<4 x i32> <i32 2113632, i32 -2139062144, i32 -2139062144, i32 -2139062144> to <16 x i8>))
693 // CHECK-LE: extractelement <2 x i64> %{{[0-9a-zA-Z_.]+}}, i32 1
694 // CHECK-LE: trunc i64 %[[EXT]] to i32
695 // CHECK-BE: call <2 x i64> @vec_vbpermq(unsigned char vector[16], unsigned char vector[16])(<16 x i8> noundef %{{[0-9a-zA-Z_.]+}}, <16 x i8> noundef bitcast (<4 x i32> <i32 -2139062144, i32 -2139062144, i32 -2139062144, i32 2113632> to <16 x i8>))
696 // CHECK-BE: %[[EXT:[0-9a-zA-Z_.]+]] = extractelement <2 x i64> %{{[0-9a-zA-Z_.]+}}, i32 0
697 // CHECK-BE: trunc i64 %[[EXT]] to i32
734 // CHECK-LABEL: define available_externally i64 @_mm_mulhi_pu16
737 // CHECK: call <2 x i64> @vec_splats(unsigned long long)
738 // CHECK: call <2 x i64> @vec_splats(unsigned long long)
742 // CHECK: extractelement <2 x i64> %{{[0-9a-zA-Z_.]+}}, i32 0
744 // CHECK-LABEL: define available_externally i64 @_m_pmulhuw
745 // CHECK: call i64 @_mm_mulhi_pu16
797 // CHECK-LABEL: define available_externally i64 @_mm_sad_pu8
798 // CHECK: call void @llvm.memset.p0.i64(ptr align 8 %{{[0-9a-zA-Z_.]+}}, i8 0, i64 8, i1 false)
799 // CHECK: insertelement <2 x i64> <i64 0, i64 poison>, i64 %{{[0-9a-zA-Z_.]+}}, i32 1
800 // CHECK: insertelement <2 x i64> <i64 0, i64 poison>, i64 %{{[0-9a-zA-Z_.]+}}, i32 1
808 // CHECK: %[[GEP:[0-9a-zA-Z_.]+]] = getelementptr inbounds [4 x i16], ptr %{{[0-9a-zA-Z_.]+}}, i64 0, i64 0
811 // CHECK-LABEL: define available_externally i64 @_m_psadbw
812 // CHECK: call i64 @_mm_sad_pu8
885 // CHECK-LABEL: define available_externally i64 @_mm_shuffle_pi16
887 // CHECK: sext i32 %[[AND]] to i64
890 // CHECK: sext i32 %[[AND2]] to i64
893 // CHECK: sext i32 %[[AND3]] to i64
896 // CHECK: sext i32 %[[AND4]] to i64
897 // CHECK: getelementptr inbounds nuw [4 x i16], ptr @_mm_shuffle_pi16.__permute_selectors, i64 0, i64 %{{[0-9a-zA-Z_.]+}}
898 // CHECK-LE: getelementptr inbounds [4 x i16], ptr %{{[0-9a-zA-Z_.]+}}, i64 0, i64 0
899 // CHECK-BE: getelementptr inbounds [4 x i16], ptr %{{[0-9a-zA-Z_.]+}}, i64 0, i64 3
900 // CHECK: getelementptr inbounds nuw [4 x i16], ptr @_mm_shuffle_pi16.__permute_selectors, i64 0, i64 %{{[0-9a-zA-Z_.]+}}
901 // CHECK-LE: getelementptr inbounds [4 x i16], ptr %{{[0-9a-zA-Z_.]+}}, i64 0, i64 1
902 // CHECK-BE: getelementptr inbounds [4 x i16], ptr %{{[0-9a-zA-Z_.]+}}, i64 0, i64 2
903 // CHECK: getelementptr inbounds nuw [4 x i16], ptr @_mm_shuffle_pi16.__permute_selectors, i64 0, i64 %{{[0-9a-zA-Z_.]+}}
904 // CHECK-LE: getelementptr inbounds [4 x i16], ptr %{{[0-9a-zA-Z_.]+}}, i64 0, i64 2
905 // CHECK-BE: getelementptr inbounds [4 x i16], ptr %{{[0-9a-zA-Z_.]+}}, i64 0, i64 1
906 // CHECK: getelementptr inbounds nuw [4 x i16], ptr @_mm_shuffle_pi16.__permute_selectors, i64 0, i64 %{{[0-9a-zA-Z_.]+}}
907 // CHECK-LE: getelementptr inbounds [4 x i16], ptr %{{[0-9a-zA-Z_.]+}}, i64 0, i64 3
908 // CHECK-BE: getelementptr inbounds [4 x i16], ptr %{{[0-9a-zA-Z_.]+}}, i64 0, i64 0
909 // CHECK: call <2 x i64> @vec_splats(unsigned long long)
910 // CHECK: call <2 x i64> @vec_splats(unsigned long long)
911 // CHECK: call <2 x i64> @vec_perm(unsigned long long vector[2], unsigned long long vector[2], unsigned char vector[16])
912 // CHECK: extractelement <2 x i64> %{{[0-9a-zA-Z_.]+}}, i32 0
916 // CHECK: sext i32 %[[AND]] to i64
919 // CHECK: sext i32 %[[AND2]] to i64
922 // CHECK: sext i32 %[[AND3]] to i64
925 // CHECK: sext i32 %[[AND4]] to i64
926 // CHECK: getelementptr inbounds nuw [4 x i32], ptr @_mm_shuffle_ps.__permute_selectors, i64 0, i64
928 // CHECK: getelementptr inbounds nuw [4 x i32], ptr @_mm_shuffle_ps.__permute_selectors, i64 0, i64
930 // CHECK: getelementptr inbounds nuw [4 x i32], ptr @_mm_shuffle_ps.__permute_selectors, i64 0, i64
933 // CHECK: getelementptr inbounds nuw [4 x i32], ptr @_mm_shuffle_ps.__permute_selectors, i64 0, i64
938 // CHECK-LABEL: define available_externally i64 @_m_pshufw
939 // CHECK: call i64 @_mm_shuffle_pi16
971 // CHECK: call void @vec_st(float vector[4], long, float vector[4]*)(<4 x float> noundef %{{[0-9a-zA-Z_.]+}}, i64 noundef 0, ptr noundef %{{[0-9a-zA-Z_.]+}})
985 // CHECK: %[[VAL:[0-9a-zA-Z_.]+]] = extractelement <2 x i64> %{{[0-9a-zA-Z_.]+}}, i32 1
986 // CHECK: store i64 %[[VAL]], ptr %{{[0-9a-zA-Z_.]+}}, align 8
989 // CHECK: %[[VAL:[0-9a-zA-Z_.]+]] = extractelement <2 x i64> %{{[0-9a-zA-Z_.]+}}, i32 0
990 // CHECK: store i64 %[[VAL]], ptr %{{[0-9a-zA-Z_.]+}}, align 8
1040 // CHECK: call <2 x i64> @vec_mergeh(long long vector[2], long long vector[2])
1041 // CHECK: call <2 x i64> @vec_mergel(long long vector[2], long long vector[2])
1042 // CHECK: call <2 x i64> @vec_mergeh(long long vector[2], long long vector[2])
1043 // CHECK: call <2 x i64> @vec_mergel(long long vector[2], long long vector[2])