Lines Matching full:the
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
19 /* Define the default attributes for the functions in this file. */
36 /// Computes the absolute value of each of the packed 8-bit signed
37 /// integers in the source operand and stores the 8-bit unsigned integer
38 /// results in the destination.
42 /// This intrinsic corresponds to the \c PABSB instruction.
46 /// \returns A 64-bit integer vector containing the absolute values of the
47 /// elements in the operand.
54 /// Computes the absolute value of each of the packed 8-bit signed
55 /// integers in the source operand and stores the 8-bit unsigned integer
56 /// results in the destination.
60 /// This intrinsic corresponds to the \c VPABSB instruction.
64 /// \returns A 128-bit integer vector containing the absolute values of the
65 /// elements in the operand.
72 /// Computes the absolute value of each of the packed 16-bit signed
73 /// integers in the source operand and stores the 16-bit unsigned integer
74 /// results in the destination.
78 /// This intrinsic corresponds to the \c PABSW instruction.
82 /// \returns A 64-bit integer vector containing the absolute values of the
83 /// elements in the operand.
90 /// Computes the absolute value of each of the packed 16-bit signed
91 /// integers in the source operand and stores the 16-bit unsigned integer
92 /// results in the destination.
96 /// This intrinsic corresponds to the \c VPABSW instruction.
100 /// \returns A 128-bit integer vector containing the absolute values of the
101 /// elements in the operand.
108 /// Computes the absolute value of each of the packed 32-bit signed
109 /// integers in the source operand and stores the 32-bit unsigned integer
110 /// results in the destination.
114 /// This intrinsic corresponds to the \c PABSD instruction.
118 /// \returns A 64-bit integer vector containing the absolute values of the
119 /// elements in the operand.
126 /// Computes the absolute value of each of the packed 32-bit signed
127 /// integers in the source operand and stores the 32-bit unsigned integer
128 /// results in the destination.
132 /// This intrinsic corresponds to the \c VPABSD instruction.
136 /// \returns A 128-bit integer vector containing the absolute values of the
137 /// elements in the operand.
144 /// Concatenates the two 128-bit integer vector operands, and
145 /// right-shifts the result by the number of bytes specified in the immediate
154 /// This intrinsic corresponds to the \c PALIGNR instruction.
157 /// A 128-bit vector of [16 x i8] containing one of the source operands.
159 /// A 128-bit vector of [16 x i8] containing one of the source operands.
161 /// An immediate operand specifying how many bytes to right-shift the result.
162 /// \returns A 128-bit integer vector containing the concatenated right-shifted
168 /// Concatenates the two 64-bit integer vector operands, and right-shifts
169 /// the result by the number of bytes specified in the immediate operand.
177 /// This intrinsic corresponds to the \c PALIGNR instruction.
180 /// A 64-bit vector of [8 x i8] containing one of the source operands.
182 /// A 64-bit vector of [8 x i8] containing one of the source operands.
184 /// An immediate operand specifying how many bytes to right-shift the result.
185 /// \returns A 64-bit integer vector containing the concatenated right-shifted
193 /// Horizontally adds the adjacent pairs of values contained in 2 packed
198 /// This intrinsic corresponds to the \c VPHADDW instruction.
201 /// A 128-bit vector of [8 x i16] containing one of the source operands. The
202 /// horizontal sums of the values are stored in the lower bits of the
205 /// A 128-bit vector of [8 x i16] containing one of the source operands. The
206 /// horizontal sums of the values are stored in the upper bits of the
208 /// \returns A 128-bit vector of [8 x i16] containing the horizontal sums of
216 /// Horizontally adds the adjacent pairs of values contained in 2 packed
221 /// This intrinsic corresponds to the \c VPHADDD instruction.
224 /// A 128-bit vector of [4 x i32] containing one of the source operands. The
225 /// horizontal sums of the values are stored in the lower bits of the
228 /// A 128-bit vector of [4 x i32] containing one of the source operands. The
229 /// horizontal sums of the values are stored in the upper bits of the
231 /// \returns A 128-bit vector of [4 x i32] containing the horizontal sums of
239 /// Horizontally adds the adjacent pairs of values contained in 2 packed
244 /// This intrinsic corresponds to the \c PHADDW instruction.
247 /// A 64-bit vector of [4 x i16] containing one of the source operands. The
248 /// horizontal sums of the values are stored in the lower bits of the
251 /// A 64-bit vector of [4 x i16] containing one of the source operands. The
252 /// horizontal sums of the values are stored in the upper bits of the
254 /// \returns A 64-bit vector of [4 x i16] containing the horizontal sums of both
263 /// Horizontally adds the adjacent pairs of values contained in 2 packed
268 /// This intrinsic corresponds to the \c PHADDD instruction.
271 /// A 64-bit vector of [2 x i32] containing one of the source operands. The
272 /// horizontal sums of the values are stored in the lower bits of the
275 /// A 64-bit vector of [2 x i32] containing one of the source operands. The
276 /// horizontal sums of the values are stored in the upper bits of the
278 /// \returns A 64-bit vector of [2 x i32] containing the horizontal sums of both
287 /// Horizontally adds, with saturation, the adjacent pairs of values contained
295 /// This intrinsic corresponds to the \c VPHADDSW instruction.
298 /// A 128-bit vector of [8 x i16] containing one of the source operands. The
299 /// horizontal sums of the values are stored in the lower bits of the
302 /// A 128-bit vector of [8 x i16] containing one of the source operands. The
303 /// horizontal sums of the values are stored in the upper bits of the
305 /// \returns A 128-bit vector of [8 x i16] containing the horizontal saturated
313 /// Horizontally adds, with saturation, the adjacent pairs of values contained
321 /// This intrinsic corresponds to the \c PHADDSW instruction.
324 /// A 64-bit vector of [4 x i16] containing one of the source operands. The
325 /// horizontal sums of the values are stored in the lower bits of the
328 /// A 64-bit vector of [4 x i16] containing one of the source operands. The
329 /// horizontal sums of the values are stored in the upper bits of the
331 /// \returns A 64-bit vector of [4 x i16] containing the horizontal saturated
340 /// Horizontally subtracts the adjacent pairs of values contained in 2
345 /// This intrinsic corresponds to the \c VPHSUBW instruction.
348 /// A 128-bit vector of [8 x i16] containing one of the source operands. The
349 /// horizontal differences between the values are stored in the lower bits of
350 /// the destination.
352 /// A 128-bit vector of [8 x i16] containing one of the source operands. The
353 /// horizontal differences between the values are stored in the upper bits of
354 /// the destination.
355 /// \returns A 128-bit vector of [8 x i16] containing the horizontal differences
363 /// Horizontally subtracts the adjacent pairs of values contained in 2
368 /// This intrinsic corresponds to the \c VPHSUBD instruction.
371 /// A 128-bit vector of [4 x i32] containing one of the source operands. The
372 /// horizontal differences between the values are stored in the lower bits of
373 /// the destination.
375 /// A 128-bit vector of [4 x i32] containing one of the source operands. The
376 /// horizontal differences between the values are stored in the upper bits of
377 /// the destination.
378 /// \returns A 128-bit vector of [4 x i32] containing the horizontal differences
386 /// Horizontally subtracts the adjacent pairs of values contained in 2
391 /// This intrinsic corresponds to the \c PHSUBW instruction.
394 /// A 64-bit vector of [4 x i16] containing one of the source operands. The
395 /// horizontal differences between the values are stored in the lower bits of
396 /// the destination.
398 /// A 64-bit vector of [4 x i16] containing one of the source operands. The
399 /// horizontal differences between the values are stored in the upper bits of
400 /// the destination.
401 /// \returns A 64-bit vector of [4 x i16] containing the horizontal differences
410 /// Horizontally subtracts the adjacent pairs of values contained in 2
415 /// This intrinsic corresponds to the \c PHSUBD instruction.
418 /// A 64-bit vector of [2 x i32] containing one of the source operands. The
419 /// horizontal differences between the values are stored in the lower bits of
420 /// the destination.
422 /// A 64-bit vector of [2 x i32] containing one of the source operands. The
423 /// horizontal differences between the values are stored in the upper bits of
424 /// the destination.
425 /// \returns A 64-bit vector of [2 x i32] containing the horizontal differences
434 /// Horizontally subtracts, with saturation, the adjacent pairs of values
442 /// This intrinsic corresponds to the \c VPHSUBSW instruction.
445 /// A 128-bit vector of [8 x i16] containing one of the source operands. The
446 /// horizontal differences between the values are stored in the lower bits of
447 /// the destination.
449 /// A 128-bit vector of [8 x i16] containing one of the source operands. The
450 /// horizontal differences between the values are stored in the upper bits of
451 /// the destination.
452 /// \returns A 128-bit vector of [8 x i16] containing the horizontal saturated
460 /// Horizontally subtracts, with saturation, the adjacent pairs of values
468 /// This intrinsic corresponds to the \c PHSUBSW instruction.
471 /// A 64-bit vector of [4 x i16] containing one of the source operands. The
472 /// horizontal differences between the values are stored in the lower bits of
473 /// the destination.
475 /// A 64-bit vector of [4 x i16] containing one of the source operands. The
476 /// horizontal differences between the values are stored in the upper bits of
477 /// the destination.
478 /// \returns A 64-bit vector of [4 x i16] containing the horizontal saturated
488 /// values contained in the first source operand and packed 8-bit signed
489 /// integer values contained in the second source operand, adds pairs of
490 /// contiguous products with signed saturation, and writes the 16-bit sums to
491 /// the corresponding bits in the destination.
494 /// both operands are multiplied, and the sum of both results is written to
495 /// bits [15:0] of the destination.
499 /// This intrinsic corresponds to the \c VPMADDUBSW instruction.
502 /// A 128-bit integer vector containing the first source operand.
504 /// A 128-bit integer vector containing the second source operand.
505 /// \returns A 128-bit integer vector containing the sums of products of both
522 /// values contained in the first source operand and packed 8-bit signed
523 /// integer values contained in the second source operand, adds pairs of
524 /// contiguous products with signed saturation, and writes the 16-bit sums to
525 /// the corresponding bits in the destination.
528 /// both operands are multiplied, and the sum of both results is written to
529 /// bits [15:0] of the destination.
533 /// This intrinsic corresponds to the \c PMADDUBSW instruction.
536 /// A 64-bit integer vector containing the first source operand.
538 /// A 64-bit integer vector containing the second source operand.
539 /// \returns A 64-bit integer vector containing the sums of products of both
552 /// Multiplies packed 16-bit signed integer values, truncates the 32-bit
553 /// products to the 18 most significant bits by right-shifting, rounds the
554 /// truncated value by adding 1, and writes bits [16:1] to the destination.
558 /// This intrinsic corresponds to the \c VPMULHRSW instruction.
561 /// A 128-bit vector of [8 x i16] containing one of the source operands.
563 /// A 128-bit vector of [8 x i16] containing one of the source operands.
564 /// \returns A 128-bit vector of [8 x i16] containing the rounded and scaled
572 /// Multiplies packed 16-bit signed integer values, truncates the 32-bit
573 /// products to the 18 most significant bits by right-shifting, rounds the
574 /// truncated value by adding 1, and writes bits [16:1] to the destination.
578 /// This intrinsic corresponds to the \c PMULHRSW instruction.
581 /// A 64-bit vector of [4 x i16] containing one of the source operands.
583 /// A 64-bit vector of [4 x i16] containing one of the source operands.
584 /// \returns A 64-bit vector of [4 x i16] containing the rounded and scaled
593 /// Copies the 8-bit integers from a 128-bit integer vector to the
594 /// destination or clears 8-bit values in the destination, as specified by
595 /// the second source operand.
599 /// This intrinsic corresponds to the \c VPSHUFB instruction.
602 /// A 128-bit integer vector containing the values to be copied.
605 /// positions in the destination:
607 /// 1: Clear the corresponding byte in the destination. \n
608 /// 0: Copy the selected source byte to the corresponding byte in the
611 /// Bits [3:0] select the source byte to be copied.
612 /// \returns A 128-bit integer vector containing the copied or cleared values.
619 /// Copies the 8-bit integers from a 64-bit integer vector to the
620 /// destination or clears 8-bit values in the destination, as specified by
621 /// the second source operand.
625 /// This intrinsic corresponds to the \c PSHUFB instruction.
628 /// A 64-bit integer vector containing the values to be copied.
631 /// positions in the destination:
633 /// 1: Clear the corresponding byte in the destination. \n
634 /// 0: Copy the selected source byte to the corresponding byte in the
636 /// Bits [2:0] select the source byte to be copied.
637 /// \returns A 64-bit integer vector containing the copied or cleared values.
647 /// For each 8-bit integer in the first source operand, perform one of
648 /// the following actions as specified by the second source operand.
650 /// If the byte in the second source is negative, calculate the two's
651 /// complement of the corresponding byte in the first source, and write that
652 /// value to the destination. If the byte in the second source is positive,
653 /// copy the corresponding byte from the first source to the destination. If
654 /// the byte in the second source is zero, clear the corresponding byte in
655 /// the destination.
659 /// This intrinsic corresponds to the \c VPSIGNB instruction.
662 /// A 128-bit integer vector containing the values to be copied.
665 /// positions in the destination.
666 /// \returns A 128-bit integer vector containing the resultant values.
673 /// For each 16-bit integer in the first source operand, perform one of
674 /// the following actions as specified by the second source operand.
676 /// If the word in the second source is negative, calculate the two's
677 /// complement of the corresponding word in the first source, and write that
678 /// value to the destination. If the word in the second source is positive,
679 /// copy the corresponding word from the first source to the destination. If
680 /// the word in the second source is zero, clear the corresponding word in
681 /// the destination.
685 /// This intrinsic corresponds to the \c VPSIGNW instruction.
688 /// A 128-bit integer vector containing the values to be copied.
691 /// positions in the destination.
692 /// \returns A 128-bit integer vector containing the resultant values.
699 /// For each 32-bit integer in the first source operand, perform one of
700 /// the following actions as specified by the second source operand.
702 /// If the doubleword in the second source is negative, calculate the two's
703 /// complement of the corresponding word in the first source, and write that
704 /// value to the destination. If the doubleword in the second source is
705 /// positive, copy the corresponding word from the first source to the
706 /// destination. If the doubleword in the second source is zero, clear the
707 /// corresponding word in the destination.
711 /// This intrinsic corresponds to the \c VPSIGND instruction.
714 /// A 128-bit integer vector containing the values to be copied.
717 /// positions in the destination.
718 /// \returns A 128-bit integer vector containing the resultant values.
725 /// For each 8-bit integer in the first source operand, perform one of
726 /// the following actions as specified by the second source operand.
728 /// If the byte in the second source is negative, calculate the two's
729 /// complement of the corresponding byte in the first source, and write that
730 /// value to the destination. If the byte in the second source is positive,
731 /// copy the corresponding byte from the first source to the destination. If
732 /// the byte in the second source is zero, clear the corresponding byte in
733 /// the destination.
737 /// This intrinsic corresponds to the \c PSIGNB instruction.
740 /// A 64-bit integer vector containing the values to be copied.
743 /// positions in the destination.
744 /// \returns A 64-bit integer vector containing the resultant values.
752 /// For each 16-bit integer in the first source operand, perform one of
753 /// the following actions as specified by the second source operand.
755 /// If the word in the second source is negative, calculate the two's
756 /// complement of the corresponding word in the first source, and write that
757 /// value to the destination. If the word in the second source is positive,
758 /// copy the corresponding word from the first source to the destination. If
759 /// the word in the second source is zero, clear the corresponding word in
760 /// the destination.
764 /// This intrinsic corresponds to the \c PSIGNW instruction.
767 /// A 64-bit integer vector containing the values to be copied.
770 /// positions in the destination.
771 /// \returns A 64-bit integer vector containing the resultant values.
779 /// For each 32-bit integer in the first source operand, perform one of
780 /// the following actions as specified by the second source operand.
782 /// If the doubleword in the second source is negative, calculate the two's
783 /// complement of the corresponding doubleword in the first source, and
784 /// write that value to the destination. If the doubleword in the second
785 /// source is positive, copy the corresponding doubleword from the first
786 /// source to the destination. If the doubleword in the second source is
787 /// zero, clear the corresponding doubleword in the destination.
791 /// This intrinsic corresponds to the \c PSIGND instruction.
794 /// A 64-bit integer vector containing the values to be copied.
797 /// to positions in the destination.
798 /// \returns A 64-bit integer vector containing the resultant values.