Lines Matching defs:__V
648 /// \param __V
654 _mm_stream_load_si128(const void *__V) {
655 return (__m128i)__builtin_nontemporal_load((const __v2di *)__V);
1096 /// \param __V
1100 __m128i __V) {
1101 return __builtin_ia32_ptestz128((__v2di)__M, (__v2di)__V);
1113 /// \param __V
1117 __m128i __V) {
1118 return __builtin_ia32_ptestc128((__v2di)__M, (__v2di)__V);
1130 /// \param __V
1135 __m128i __V) {
1136 return __builtin_ia32_ptestnzc128((__v2di)__M, (__v2di)__V);
1223 /// \param __V
1227 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi16(__m128i __V) {
1231 __builtin_shufflevector((__v16qs)__V, (__v16qs)__V, 0, 1, 2, 3, 4, 5, 6,
1245 /// \param __V
1249 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi32(__m128i __V) {
1253 __builtin_shufflevector((__v16qs)__V, (__v16qs)__V, 0, 1, 2, 3), __v4si);
1265 /// \param __V
1269 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi64(__m128i __V) {
1273 __builtin_shufflevector((__v16qs)__V, (__v16qs)__V, 0, 1), __v2di);
1285 /// \param __V
1289 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi16_epi32(__m128i __V) {
1291 __builtin_shufflevector((__v8hi)__V, (__v8hi)__V, 0, 1, 2, 3), __v4si);
1303 /// \param __V
1307 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi16_epi64(__m128i __V) {
1309 __builtin_shufflevector((__v8hi)__V, (__v8hi)__V, 0, 1), __v2di);
1321 /// \param __V
1325 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi32_epi64(__m128i __V) {
1327 __builtin_shufflevector((__v4si)__V, (__v4si)__V, 0, 1), __v2di);
1340 /// \param __V
1344 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi16(__m128i __V) {
1346 __builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1, 2, 3, 4, 5, 6,
1360 /// \param __V
1364 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi32(__m128i __V) {
1366 __builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1, 2, 3), __v4si);
1378 /// \param __V
1382 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi64(__m128i __V) {
1384 __builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1), __v2di);
1396 /// \param __V
1400 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu16_epi32(__m128i __V) {
1402 __builtin_shufflevector((__v8hu)__V, (__v8hu)__V, 0, 1, 2, 3), __v4si);
1414 /// \param __V
1418 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu16_epi64(__m128i __V) {
1420 __builtin_shufflevector((__v8hu)__V, (__v8hu)__V, 0, 1), __v2di);
1432 /// \param __V
1436 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu32_epi64(__m128i __V) {
1438 __builtin_shufflevector((__v4su)__V, (__v4su)__V, 0, 1), __v2di);
1513 /// \param __V
1516 /// in parameter \a __V, bits [18:16] contain the index of the minimum value
1518 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_minpos_epu16(__m128i __V) {
1519 return (__m128i)__builtin_ia32_phminposuw128((__v8hi)__V);