Lines Matching defs:v8u16
20 typedef unsigned short v8u16 __attribute__((vector_size(16), aligned(16)));
228 return (__m128i)__builtin_lsx_vbitclr_h((v8u16)_1, (v8u16)_2);
247 ((__m128i)__builtin_lsx_vbitclri_h((v8u16)(_1), (_2)))
264 return (__m128i)__builtin_lsx_vbitset_h((v8u16)_1, (v8u16)_2);
283 ((__m128i)__builtin_lsx_vbitseti_h((v8u16)(_1), (_2)))
300 return (__m128i)__builtin_lsx_vbitrev_h((v8u16)_1, (v8u16)_2);
319 ((__m128i)__builtin_lsx_vbitrevi_h((v8u16)(_1), (_2)))
444 return (__m128i)__builtin_lsx_vmax_hu((v8u16)_1, (v8u16)_2);
463 ((__m128i)__builtin_lsx_vmaxi_hu((v8u16)(_1), (_2)))
516 return (__m128i)__builtin_lsx_vmin_hu((v8u16)_1, (v8u16)_2);
535 ((__m128i)__builtin_lsx_vmini_hu((v8u16)(_1), (_2)))
624 return (__m128i)__builtin_lsx_vslt_hu((v8u16)_1, (v8u16)_2);
643 ((__m128i)__builtin_lsx_vslti_hu((v8u16)(_1), (_2)))
696 return (__m128i)__builtin_lsx_vsle_hu((v8u16)_1, (v8u16)_2);
715 ((__m128i)__builtin_lsx_vslei_hu((v8u16)(_1), (_2)))
739 ((__m128i)__builtin_lsx_vsat_hu((v8u16)(_1), (_2)))
804 return (__m128i)__builtin_lsx_vsadd_hu((v8u16)_1, (v8u16)_2);
852 return (__m128i)__builtin_lsx_vavg_hu((v8u16)_1, (v8u16)_2);
900 return (__m128i)__builtin_lsx_vavgr_hu((v8u16)_1, (v8u16)_2);
948 return (__m128i)__builtin_lsx_vssub_hu((v8u16)_1, (v8u16)_2);
996 return (__m128i)__builtin_lsx_vabsd_hu((v8u16)_1, (v8u16)_2);
1116 return (__m128i)__builtin_lsx_vdiv_hu((v8u16)_1, (v8u16)_2);
1158 return (__m128i)__builtin_lsx_vhaddw_wu_hu((v8u16)_1, (v8u16)_2);
1194 return (__m128i)__builtin_lsx_vhsubw_wu_hu((v8u16)_1, (v8u16)_2);
1236 return (__m128i)__builtin_lsx_vmod_hu((v8u16)_1, (v8u16)_2);
1974 return (__m128i)__builtin_lsx_vmuh_hu((v8u16)_1, (v8u16)_2);
2002 ((__m128i)__builtin_lsx_vsllwil_wu_hu((v8u16)(_1), (_2)))
2046 return (__m128i)__builtin_lsx_vssran_bu_h((v8u16)_1, (v8u16)_2);
2100 return (__m128i)__builtin_lsx_vssrarn_bu_h((v8u16)_1, (v8u16)_2);
2136 return (__m128i)__builtin_lsx_vssrln_bu_h((v8u16)_1, (v8u16)_2);
2172 return (__m128i)__builtin_lsx_vssrlrn_bu_h((v8u16)_1, (v8u16)_2);
2571 return (__m128i)__builtin_lsx_vaddwev_w_hu((v8u16)_1, (v8u16)_2);
2589 return (__m128i)__builtin_lsx_vaddwod_w_hu((v8u16)_1, (v8u16)_2);
2607 return (__m128i)__builtin_lsx_vaddwev_w_hu_h((v8u16)_1, (v8i16)_2);
2625 return (__m128i)__builtin_lsx_vaddwod_w_hu_h((v8u16)_1, (v8i16)_2);
2679 return (__m128i)__builtin_lsx_vsubwev_w_hu((v8u16)_1, (v8u16)_2);
2697 return (__m128i)__builtin_lsx_vsubwod_w_hu((v8u16)_1, (v8u16)_2);
2811 return (__m128i)__builtin_lsx_vmulwev_w_hu((v8u16)_1, (v8u16)_2);
2829 return (__m128i)__builtin_lsx_vmulwod_w_hu((v8u16)_1, (v8u16)_2);
2847 return (__m128i)__builtin_lsx_vmulwev_w_hu_h((v8u16)_1, (v8i16)_2);
2865 return (__m128i)__builtin_lsx_vmulwod_w_hu_h((v8u16)_1, (v8i16)_2);
2961 return (__m128i)__builtin_lsx_vmaddwev_w_hu((v4u32)_1, (v8u16)_2, (v8u16)_3);
2967 return (__m128i)__builtin_lsx_vmaddwev_h_bu((v8u16)_1, (v16u8)_2, (v16u8)_3);
2997 return (__m128i)__builtin_lsx_vmaddwod_w_hu((v4u32)_1, (v8u16)_2, (v8u16)_3);
3003 return (__m128i)__builtin_lsx_vmaddwod_h_bu((v8u16)_1, (v16u8)_2, (v16u8)_3);
3016 return (__m128i)__builtin_lsx_vmaddwev_w_hu_h((v4i32)_1, (v8u16)_2,
3037 return (__m128i)__builtin_lsx_vmaddwod_w_hu_h((v4i32)_1, (v8u16)_2,
3179 return (__m128i)__builtin_lsx_vexth_wu_hu((v8u16)_1);
3252 ((__m128i)__builtin_lsx_vssrlni_hu_w((v8u16)(_1), (v8i16)(_2), (_3)))
3276 ((__m128i)__builtin_lsx_vssrlrni_hu_w((v8u16)(_1), (v8i16)(_2), (_3)))
3324 ((__m128i)__builtin_lsx_vssrani_hu_w((v8u16)(_1), (v8i16)(_2), (_3)))
3348 ((__m128i)__builtin_lsx_vssrarni_hu_w((v8u16)(_1), (v8i16)(_2), (_3)))
3437 #define __lsx_bnz_h(/*__m128i*/ _1) ((int)__builtin_lsx_bnz_h((v8u16)(_1)))
3447 #define __lsx_bz_h(/*__m128i*/ _1) ((int)__builtin_lsx_bz_h((v8u16)(_1)))