Lines Matching defs:IVSigned

2908   const bool IVSigned = IVExpr->getType()->hasSignedIntegerRepresentation();
2932         RT.emitForNext(*this, S.getBeginLoc(), IVSize, IVSigned, LoopArgs.IL,
2974       [&S, &LoopArgs, LoopExit, &CodeGenLoop, IVSize, IVSigned, &CodeGenOrdered,
2987             [IVSize, IVSigned, Loc, &CodeGenOrdered](CodeGenFunction &CGF) {
2988               CodeGenOrdered(CGF, Loc, IVSize, IVSigned);
3083   const bool IVSigned = IVExpr->getType()->hasSignedIntegerRepresentation();
3093                            IVSigned, Ordered, DipatchRTInputValues);
3096         IVSize, IVSigned, Ordered, LoopArgs.IL, LoopArgs.LB, LoopArgs.UB,
3105                                     const bool IVSigned) {
3108                                                             IVSigned);
3128                              const unsigned IVSize, const bool IVSigned) {}
3144   const bool IVSigned = IVExpr->getType()->hasSignedIntegerRepresentation();
3148       IVSize, IVSigned, /* Ordered = */ false, LoopArgs.IL, LoopArgs.LB,
3476       const bool IVSigned = IVExpr->getType()->hasSignedIntegerRepresentation();
3508             [IVSize, IVSigned, Ordered, IL, LB, UB, ST, StaticChunkedOne, Chunk,
3517                   IVSize, IVSigned, Ordered, IL.getAddress(), LB.getAddress(),
4177         /*IVSize=*/32, /*IVSigned=*/true, /*Ordered=*/false, IL.getAddress(),
5867       const bool IVSigned = IVExpr->getType()->hasSignedIntegerRepresentation();
5884             IVSize, IVSigned, /* Ordered = */ false, IL.getAddress(),