Lines Matching full:features

119 void WebAssemblyTargetInfo::setSIMDLevel(llvm::StringMap<bool> &Features,
124       Features["relaxed-simd"] = true;
127       Features["simd128"] = true;
138     Features["simd128"] = false;
141     Features["relaxed-simd"] = false;
146 void WebAssemblyTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
150     setSIMDLevel(Features, SIMD128, Enabled);
152     setSIMDLevel(Features, RelaxedSIMD, Enabled);
154     Features[Name] = Enabled;
158     llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
161     Features["bulk-memory"] = true;
162     Features["bulk-memory-opt"] = true;
163     Features["call-indirect-overlong"] = true;
164     Features["multivalue"] = true;
165     Features["mutable-globals"] = true;
166     Features["nontrapping-fptoint"] = true;
167     Features["reference-types"] = true;
168     Features["sign-ext"] = true;
173     Features["bulk-memory-opt"] = true;
174     Features["call-indirect-overlong"] = true;
175     Features["extended-const"] = true;
176     Features["multivalue"] = true;
177     Features["mutable-globals"] = true;
178     Features["nontrapping-fptoint"] = true;
179     Features["sign-ext"] = true;
183     Features["atomics"] = true;
184     Features["exception-handling"] = true;
185     Features["extended-const"] = true;
186     Features["fp16"] = true;
187     Features["multimemory"] = true;
188     Features["tail-call"] = true;
189     Features["wide-arithmetic"] = true;
190     setSIMDLevel(Features, RelaxedSIMD, true);
200   return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
204     std::vector<std::string> &Features, DiagnosticsEngine &Diags) {
205   for (const auto &Feature : Features) {