Lines Matching defs:Opts

95   BaseSPIRTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
110     llvm::Triple HostTriple(Opts.HostTriple);
113       HostTarget = AllocateTarget(llvm::Triple(Opts.HostTriple), Opts);
201   void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override {
202     TargetInfo::adjust(Diags, Opts);
212         /*DefaultIsGeneric=*/Opts.SYCLIsDevice ||
215         (getTriple().isSPIRV() && Opts.CUDAIsDevice));
231   SPIRTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
232       : BaseSPIRTargetInfo(Triple, Opts) {
240   void getTargetDefines(const LangOptions &Opts,
252   SPIR32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
253       : SPIRTargetInfo(Triple, Opts) {
263   void getTargetDefines(const LangOptions &Opts,
269   SPIR64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
270       : SPIRTargetInfo(Triple, Opts) {
280   void getTargetDefines(const LangOptions &Opts,
286   BaseSPIRVTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
287       : BaseSPIRTargetInfo(Triple, Opts) {
295   void getTargetDefines(const LangOptions &Opts,
301   SPIRVTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
302       : BaseSPIRVTargetInfo(Triple, Opts) {
319   void getTargetDefines(const LangOptions &Opts,
325   SPIRV32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
326       : BaseSPIRVTargetInfo(Triple, Opts) {
343   void getTargetDefines(const LangOptions &Opts,
349   SPIRV64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
350       : BaseSPIRVTargetInfo(Triple, Opts) {
367   void getTargetDefines(const LangOptions &Opts,
374   SPIRV64AMDGCNTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
375       : BaseSPIRVTargetInfo(Triple, Opts) {
415   void getTargetDefines(const LangOptions &Opts,
420   void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override {
421     TargetInfo::adjust(Diags, Opts);