Lines Matching defs:Inst

81   bool isNop(const MCInst &Inst) const {
82     return Inst.getOpcode() == RISCV::ADDI &&
83            Inst.getOperand(0).getReg() == RISCV::X0 &&
84            Inst.getOperand(1).getReg() == RISCV::X0 &&
85            Inst.getOperand(2).getImm() == 0;
88   bool isCNop(const MCInst &Inst) const {
89     return Inst.getOpcode() == RISCV::C_NOP;
92   bool isNoop(const MCInst &Inst) const override {
93     return isNop(Inst) || isCNop(Inst);
96   bool isPseudo(const MCInst &Inst) const override {
97     switch (Inst.getOpcode()) {
99       return MCPlusBuilder::isPseudo(Inst);
106   bool isIndirectCall(const MCInst &Inst) const override {
107     if (!isCall(Inst))
110     switch (Inst.getOpcode()) {
120   bool hasPCRelOperand(const MCInst &Inst) const override {
121     switch (Inst.getOpcode()) {
154   void reverseBranchCondition(MCInst &Inst, const MCSymbol *TBB,
156     auto Opcode = getInvertedBranchOpcode(Inst.getOpcode());
157     Inst.setOpcode(Opcode);
158     replaceBranchTarget(Inst, TBB, Ctx);
161   void replaceBranchTarget(MCInst &Inst, const MCSymbol *TBB,
163     assert((isCall(Inst) || isBranch(Inst)) && !isIndirectBranch(Inst) &&
167     auto Result = getSymbolRefOperandNum(Inst, SymOpIndex);
171     Inst.getOperand(SymOpIndex) = MCOperand::createExpr(
201   bool convertJmpToTailCall(MCInst &Inst) override {
202     if (isTailCall(Inst))
205     switch (Inst.getOpcode()) {
215     setTailCall(Inst);
219   void createReturn(MCInst &Inst) const override {
221     Inst.setOpcode(RISCV::JALR);
222     Inst.clear();
223     Inst.addOperand(MCOperand::createReg(RISCV::X0));
224     Inst.addOperand(MCOperand::createReg(RISCV::X1));
225     Inst.addOperand(MCOperand::createImm(0));
228   void createUncondBranch(MCInst &Inst, const MCSymbol *TBB,
230     Inst.setOpcode(RISCV::JAL);
231     Inst.clear();
232     Inst.addOperand(MCOperand::createReg(RISCV::X0));
233     Inst.addOperand(MCOperand::createExpr(
241   void createCall(unsigned Opcode, MCInst &Inst, const MCSymbol *Target,
243     Inst.setOpcode(Opcode);
244     Inst.clear();
245     Inst.addOperand(MCOperand::createExpr(RISCVMCExpr::create(
250   void createCall(MCInst &Inst, const MCSymbol *Target,
252     return createCall(RISCV::PseudoCALL, Inst, Target, Ctx);
255   void createTailCall(MCInst &Inst, const MCSymbol *Target,
257     return createCall(RISCV::PseudoTAIL, Inst, Target, Ctx);
312   bool getSymbolRefOperandNum(const MCInst &Inst, unsigned &OpNum) const {
313     switch (Inst.getOpcode()) {
352   const MCSymbol *getTargetSymbol(const MCInst &Inst,
354     if (!OpNum && !getSymbolRefOperandNum(Inst, OpNum))
357     const MCOperand &Op = Inst.getOperand(OpNum);
364   bool lowerTailCall(MCInst &Inst) override {
365     removeAnnotation(Inst, MCPlus::MCAnnotation::kTailCall);
366     if (getConditionalTailCall(Inst))
367       unsetConditionalTailCall(Inst);
406   bool replaceImmWithSymbolRef(MCInst &Inst, const MCSymbol *Symbol,
411     for (unsigned Index = 0; Index < MCPlus::getNumPrimeOperands(Inst);
413       if (Inst.getOperand(Index).isImm()) {
422     Value = Inst.getOperand(ImmOpNo).getImm();
423     setOperandToSymbolRef(Inst, ImmOpNo, Symbol, Addend, Ctx, RelType);
427   const MCExpr *getTargetExprFor(MCInst &Inst, const MCExpr *Expr,
453   bool evaluateMemOperandTarget(const MCInst &Inst, uint64_t &Target,
459   bool isCallAuipc(const MCInst &Inst) const {
460     if (Inst.getOpcode() != RISCV::AUIPC)
463     const auto &ImmOp = Inst.getOperand(1);