Lines Matching defs:LBR
49 cl::desc("aggregate basic samples (without LBR info)"),
54 cl::desc("Generate LBR info with perf itrace argument"),
79 cl::desc("ignore kernel interrupt LBR that happens asynchronously"),
85 cl::desc("maximum number of samples to read from LBR profile"),
175 launchPerfProcess("events without LBR",
890 // Adjust FromBB if the first LBR is a return from the last instruction in
901 LLVM_DEBUG(dbgs() << "invalid incoming LBR (no call): " << FirstLBR
904 LLVM_DEBUG(dbgs() << "invalid incoming LBR: " << FirstLBR << '\n');
1032 reportError("expected rest of LBR entry");
1089 LBREntry LBR = LBRRes.get();
1090 if (ignoreKernelInterrupt(LBR))
1093 adjustLBR(LBR, MMapInfoIter->second);
1094 Res.LBR.push_back(LBR);
1278 bool DataAggregator::ignoreKernelInterrupt(LBREntry &LBR) const {
1280 (LBR.From >= KernelBaseAddr || LBR.To >= KernelBaseAddr);
1323 for (const LBREntry &LBR : Sample.LBR) {
1326 const uint64_t TraceFrom = LBR.To;
1330 NextLBR = &LBR;
1332 if (!Sample.LBR.empty()) {
1333 HM.registerAddress(Sample.LBR.front().To);
1334 HM.registerAddress(Sample.LBR.back().From);
1336 NumTotalSamples += Sample.LBR.size();
1338 outs() << "HEATMAP: read " << NumTotalSamples << " LBR samples\n";
1347 errs() << "HEATMAP-ERROR: no LBR traces detected in profile. "
1356 for (const auto &LBR : FallthroughLBRs) {
1357 const Trace &Trace = LBR.first;
1358 const FTInfo &Info = LBR.second;
1390 for (const LBREntry &LBR : Sample.LBR) {
1392 // Hardware bug workaround: Intel Skylake (which has 32 LBR entries)
1402 const uint64_t TraceFrom = LBR.To;
1408 if (TraceBF->containsAddress(LBR.From))
1438 NextLBR = &LBR;
1440 uint64_t From = getBinaryFunctionContainingAddress(LBR.From) ? LBR.From : 0;
1441 uint64_t To = getBinaryFunctionContainingAddress(LBR.To) ? LBR.To : 0;
1446 Info.MispredCount += LBR.Mispred;
1476 if (Sample.LBR.empty()) {
1481 NumEntries += Sample.LBR.size();
1482 if (BAT && Sample.LBR.size() == 32 && !NeedsSkylakeFix) {
1512 << " LBR entries\n";
1518 "LBR. Record profile with perf record -j any or run perf2bolt "
1519 "in no-LBR mode with -nl (the performance improvement in -nl "
1594 outs() << "PERF2BOLT: parsing basic events (without LBR)...\n";
1616 outs() << "PERF2BOLT: processing basic events (without LBR)...\n";
1767 << " aggregated LBR entries\n";
2443 void DataAggregator::dump(const LBREntry &LBR) const {
2444 Diag << "From: " << Twine::utohexstr(LBR.From)
2445 << " To: " << Twine::utohexstr(LBR.To) << " Mispred? " << LBR.Mispred
2450 Diag << "Sample LBR entries: " << Sample.LBR.size() << "\n";
2451 for (const LBREntry &LBR : Sample.LBR)
2452 dump(LBR);