Lines Matching +full:non +full:- +full:prefetchable
1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
16 * 3. Neither the name of the author nor the names of any co-contributors
55 cap = read_config(fd, &p->pc_sel, ptr + PCIR_POWER_CAP, 2); in cap_power()
56 status = read_config(fd, &p->pc_sel, ptr + PCIR_POWER_STATUS, 2); in cap_power()
69 status = read_config(fd, &p->pc_sel, ptr + AGP_STATUS, 4); in cap_agp()
70 command = read_config(fd, &p->pc_sel, ptr + AGP_CAPID, 4); in cap_agp()
131 ctrl = read_config(fd, &p->pc_sel, ptr + PCIR_MSI_CTRL, 2); in cap_msi()
150 status = read_config(fd, &p->pc_sel, ptr + PCIXR_STATUS, 4); in cap_pcix()
151 printf("PCI-X "); in cap_pcix()
153 printf("64-bit "); in cap_pcix()
154 if ((p->pc_hdr & PCIM_HDRTYPE) == 1) in cap_pcix()
156 if ((p->pc_hdr & PCIM_HDRTYPE) != 1 || (status & (PCIXM_STATUS_133CAP | in cap_pcix()
172 if ((p->pc_hdr & PCIM_HDRTYPE) == 1) in cap_pcix()
226 command = read_config(fd, &p->pc_sel, ptr + PCIR_HT_COMMAND, 2); in cap_ht()
260 reg = read_config(fd, &p->pc_sel, in cap_ht()
264 reg = read_config(fd, &p->pc_sel, in cap_ht()
285 printf("function-level extension"); in cap_ht()
304 length = read_config(fd, &p->pc_sel, ptr + PCIR_VENDOR_LENGTH, 1); in cap_vendor()
306 if (p->pc_vendor == 0x8086) { in cap_vendor()
310 version = read_config(fd, &p->pc_sel, ptr + PCIR_VENDOR_DATA, in cap_vendor()
319 fvec = read_config(fd, &p->pc_sel, ptr + in cap_vendor()
326 fvec = read_config(fd, &p->pc_sel, ptr + in cap_vendor()
333 printf("%s SATA RAID-5", comma ? "," : ""); in cap_vendor()
341 printf("%s 6 PCI-e x1 slots", comma ? "," : ""); in cap_vendor()
344 printf("%s 4 PCI-e x1 slots", comma ? "," : ""); in cap_vendor()
348 printf("%s SATA RAID-0/1/10", comma ? "," : ""); in cap_vendor()
362 debug_port = read_config(fd, &p->pc_sel, ptr + PCIR_DEBUG_PORT, 2); in cap_debug()
373 id = read_config(fd, &p->pc_sel, ptr + PCIR_SUBVENDCAP_ID, 4); in cap_subvendor()
434 cap_h = read_config(fd, &p->pc_sel, ptr + PCIR_AMDIOMMU_CAP_HEADER, 4); in cap_secdev()
443 base_low = read_config(fd, &p->pc_sel, ptr + PCIR_AMDIOMMU_BASE_LOW, in cap_secdev()
445 base_high = read_config(fd, &p->pc_sel, ptr + PCIR_AMDIOMMU_BASE_HIGH, in cap_secdev()
465 range = read_config(fd, &p->pc_sel, ptr + PCIR_AMDIOMMU_RANGE, 4); in cap_secdev()
474 misc0 = read_config(fd, &p->pc_sel, ptr + PCIR_AMDIOMMU_MISC0, 4); in cap_secdev()
480 misc1 = read_config(fd, &p->pc_sel, in cap_secdev()
582 flags = read_config(fd, &p->pc_sel, ptr + PCIER_FLAGS, 2); in cap_express()
584 printf("PCI-Express %u ", version); in cap_express()
619 cap = read_config(fd, &p->pc_sel, ptr + PCIER_DEVICE_CAP, 4); in cap_express()
620 ctl = read_config(fd, &p->pc_sel, ptr + PCIER_DEVICE_CTL, 2); in cap_express()
631 cap = read_config(fd, &p->pc_sel, ptr + PCIER_DEVICE_CAP2, 4); in cap_express()
633 ctl = read_config(fd, &p->pc_sel, in cap_express()
641 cap = read_config(fd, &p->pc_sel, ptr + PCIER_LINK_CAP, 4); in cap_express()
642 sta = read_config(fd, &p->pc_sel, ptr + PCIER_LINK_STA, 2); in cap_express()
654 ctl = read_config(fd, &p->pc_sel, ptr + PCIER_LINK_CTL, 2); in cap_express()
659 ctl = read_config(fd, &p->pc_sel, ptr + PCIER_LINK_CTL, 2); in cap_express()
665 cap = read_config(fd, &p->pc_sel, ptr + PCIER_SLOT_CAP, 4); in cap_express()
666 sta = read_config(fd, &p->pc_sel, ptr + PCIER_SLOT_STA, 2); in cap_express()
667 ctl = read_config(fd, &p->pc_sel, ptr + PCIER_SLOT_CTL, 2); in cap_express()
695 ctrl = read_config(fd, &p->pc_sel, ptr + PCIR_MSIX_CTRL, 2); in cap_msix()
698 val = read_config(fd, &p->pc_sel, ptr + PCIR_MSIX_TABLE, 4); in cap_msix()
702 val = read_config(fd, &p->pc_sel, ptr + PCIR_MSIX_PBA, 4); in cap_msix()
706 printf("MSI-X supports %d message%s%s\n", msgnum, in cap_msix()
719 printf("SATA Index-Data Pair"); in cap_sata()
727 cap = read_config(fd, &p->pc_sel, ptr + PCIR_PCIAF_CAP, 1); in cap_pciaf()
744 return (barstr[bei - PCIM_EA_BEI_BAR_0]); in ea_bei_to_name()
746 return (vfbarstr[bei - PCIM_EA_BEI_VF_BAR_0]); in ea_bei_to_name()
767 return "Non-Prefetchable Memory"; in ea_prop_to_name()
769 return "Prefetchable Memory"; in ea_prop_to_name()
773 return "VF Prefetchable Memory"; in ea_prop_to_name()
775 return "VF Non-Prefetchable Memory"; in ea_prop_to_name()
777 return "Bridge Non-Prefetchable Memory"; in ea_prop_to_name()
779 return "Bridge Prefetchable Memory"; in ea_prop_to_name()
807 num_ent = read_config(fd, &p->pc_sel, ptr + PCIR_EA_NUM_ENT, 2); in cap_ea()
816 if ((p->pc_hdr & PCIM_HDRTYPE) == PCIM_HDRTYPE_BRIDGE) { in cap_ea()
817 val = read_config(fd, &p->pc_sel, ptr, 4); in cap_ea()
829 val = read_config(fd, &p->pc_sel, ptr, 4); in cap_ea()
834 dw[b] = read_config(fd, &p->pc_sel, ptr, 4); in cap_ea()
861 (flags & PCIM_EA_WRITABLE ? "Writable" : "Read-only"), in cap_ea()
876 sta = read_config(fd, &p->pc_sel, PCIR_STATUS, 2); in list_caps()
882 switch (p->pc_hdr & PCIM_HDRTYPE) { in list_caps()
896 ptr = read_config(fd, &p->pc_sel, ptr, 1); in list_caps()
898 cap = read_config(fd, &p->pc_sel, ptr + PCICAP_ID, 1); in list_caps()
952 ptr = read_config(fd, &p->pc_sel, ptr + PCICAP_NEXTPTR, 1); in list_caps()
982 sta = read_config(fd, &p->pc_sel, ptr + PCIR_AER_UC_STATUS, 4); in ecap_aer()
983 mask = read_config(fd, &p->pc_sel, ptr + PCIR_AER_UC_SEVERITY, 4); in ecap_aer()
985 printf(" %d non-fatal", bitcount32(sta & ~mask)); in ecap_aer()
986 sta = read_config(fd, &p->pc_sel, ptr + PCIR_AER_COR_STATUS, 4); in ecap_aer()
1000 cap1 = read_config(fd, &p->pc_sel, ptr + PCIR_VC_CAP1, 4); in ecap_vc()
1003 printf(" lowpri VC0-VC%d", in ecap_vc()
1018 low = read_config(fd, &p->pc_sel, ptr + PCIR_SERIAL_LOW, 4); in ecap_sernum()
1019 high = read_config(fd, &p->pc_sel, ptr + PCIR_SERIAL_HIGH, 4); in ecap_sernum()
1030 val = read_config(fd, &p->pc_sel, ptr, 4); in ecap_vendor()
1032 hdr = read_config(fd, &p->pc_sel, ptr + PCIR_VSEC_HEADER, 4); in ecap_vendor()
1037 len = nextptr - ptr; in ecap_vendor()
1045 val = read_config(fd, &p->pc_sel, ptr + i, 4); in ecap_vendor()
1067 val = read_config(fd, &p->pc_sel, ptr + 8, 4); in ecap_sec_pcie()
1086 printf("SR-IOV %d ", ver); in ecap_sriov()
1088 iov_ctl = read_config(fd, &p->pc_sel, ptr + PCIR_SRIOV_CTL, 2); in ecap_sriov()
1094 total_vfs = read_config(fd, &p->pc_sel, ptr + PCIR_SRIOV_TOTAL_VFS, 2); in ecap_sriov()
1095 num_vfs = read_config(fd, &p->pc_sel, ptr + PCIR_SRIOV_NUM_VFS, 2); in ecap_sriov()
1099 vf_offset = read_config(fd, &p->pc_sel, ptr + PCIR_SRIOV_VF_OFF, 2); in ecap_sriov()
1100 vf_stride = read_config(fd, &p->pc_sel, ptr + PCIR_SRIOV_VF_STRIDE, 2); in ecap_sriov()
1105 vf_did = read_config(fd, &p->pc_sel, ptr + PCIR_SRIOV_VF_DID, 2); in ecap_sriov()
1108 page_caps = read_config(fd, &p->pc_sel, ptr + PCIR_SRIOV_PAGE_CAP, 4); in ecap_sriov()
1109 page_size = read_config(fd, &p->pc_sel, ptr + PCIR_SRIOV_PAGE_SIZE, 4); in ecap_sriov()
1114 page_shift = ffs(page_caps) - 1; in ecap_sriov()
1159 acs_cap = read_config(fd, &p->pc_sel, ptr + PCIR_ACS_CAP, 2); in ecap_acs()
1160 acs_ctl = read_config(fd, &p->pc_sel, ptr + PCIR_ACS_CTL, 2); in ecap_acs()
1225 { PCIZ_M_PCIE, "PCIe over M-PHY" },
1228 { PCIZ_DVSEC, "Designated Vendor-Specific" },
1250 ecap = read_config(fd, &p->pc_sel, ptr, 4); in list_ecaps()
1290 ecap = read_config(fd, &p->pc_sel, ptr, 4); in list_ecaps()
1302 sta = read_config(fd, &p->pc_sel, PCIR_STATUS, 2); in pci_find_cap()
1306 switch (p->pc_hdr & PCIM_HDRTYPE) { in pci_find_cap()
1318 ptr = read_config(fd, &p->pc_sel, ptr, 1); in pci_find_cap()
1320 cap = read_config(fd, &p->pc_sel, ptr + PCICAP_ID, 1); in pci_find_cap()
1323 ptr = read_config(fd, &p->pc_sel, ptr + PCICAP_NEXTPTR, 1); in pci_find_cap()
1336 ecap = read_config(fd, &p->pc_sel, ptr, 4); in pcie_find_cap()
1345 ecap = read_config(fd, &p->pc_sel, ptr, 4); in pcie_find_cap()