Lines Matching full:irq

59 #define	IRQ_PERMITTED(irq)	(((1U << (irq)) & PERMITTED_IRQS) != 0)
61 /* IRQ count to disable an IRQ. */
77  * Returns true if this pin is enabled with a valid IRQ.  Setting the
78  * register to a reserved IRQ causes interrupts to not be asserted as
117 pci_irq_reserve(int irq)
120 	assert(irq >= 0 && irq < NIRQ_COUNTS);
122 	assert(irq_counts[irq] == 0 || irq_counts[irq] == IRQ_DISABLED);
123 	irq_counts[irq] = IRQ_DISABLED;
127 pci_irq_use(int irq)
130 	assert(irq >= 0 && irq < NIRQ_COUNTS);
132 	assert(irq_counts[irq] != IRQ_DISABLED);
133 	irq_counts[irq]++;
161 	pin = pi->pi_lintr.irq.pirq_pin;
169 			    pi->pi_lintr.irq.ioapic_irq);
175 	vm_ioapic_assert_irq(pi->pi_vmctx, pi->pi_lintr.irq.ioapic_irq);
184 	pin = pi->pi_lintr.irq.pirq_pin;
192 			    pi->pi_lintr.irq.ioapic_irq);
198 	vm_ioapic_deassert_irq(pi->pi_vmctx, pi->pi_lintr.irq.ioapic_irq);
205 	int best_count, best_irq, best_pin, irq, pin;
225 	/* Second, route this pin to an IRQ. */
229 		for (irq = 0; irq < NIRQ_COUNTS; irq++) {
230 			if (irq_counts[irq] == IRQ_DISABLED)
232 			if (best_irq == -1 || irq_counts[irq] < best_count) {
233 				best_irq = irq;
234 				best_count = irq_counts[irq];
254 pci_irq_route(struct pci_devinst *pi, struct pci_irq *irq)
260 	if (irq->ioapic_irq == 0)
261 		irq->ioapic_irq = ioapic_pci_alloc_irq(pi);
262 	assert(irq->ioapic_irq > 0);
268 	if (irq->pirq_pin == 0)
269 		irq->pirq_pin = pirq_alloc_pin(pi);
270 	assert(irq->pirq_pin > 0);
279 	int irq, pin;
282 	for (irq = 0; irq < NIRQ_COUNTS; irq++) {
283 		if (!IRQ_PERMITTED(irq))
286 			asprintf(&irq_prs, "%d", irq);
289 			asprintf(&irq_prs, "%s,%d", old, irq);
340 		dsdt_line("    IRQ (Level, ActiveLow, Shared, )");
345 		dsdt_line("    IRQ (Level, ActiveLow, Shared, )");