1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
96 	fdt_property_string(fdt, "enable-method", "psci");  in add_cpu()
106 	/* XXX: Needed given the root #address-cells? */  in add_cpus()
107 	fdt_property_u32(fdt, "#address-cells", 2);  in add_cpus()
108 	fdt_property_u32(fdt, "#size-cells", 0);  in add_cpus()
128 	/* Add the memory reserve map (needed even if none is reserved) */  in fdt_init()
135 	fdt_property_u32(fdt, "#address-cells", 2);  in fdt_init()
136 	fdt_property_u32(fdt, "#size-cells", 2);  in fdt_init()
139 	fdt_property_string(fdt, "stdout-path", "serial0:115200n8");  in fdt_init()
155 	fdt_property_string(fdt, "compatible", "arm,psci-1.0");  in fdt_init()
159 	fdt_begin_node(fdt, "apb-pclk");  in fdt_init()
160 	fdt_property_string(fdt, "compatible", "fixed-clock");  in fdt_init()
161 	fdt_property_string(fdt, "clock-output-names", "clk24mhz");  in fdt_init()
162 	fdt_property_u32(fdt, "#clock-cells", 0);  in fdt_init()
163 	fdt_property_u32(fdt, "clock-frequency", 24000000);  in fdt_init()
182 	snprintf(node_name, sizeof(node_name), "interrupt-controller@%lx",  in fdt_add_gic()
187 	fdt_property_string(fdt, "compatible", "arm,gic-v3");  in fdt_add_gic()
188 	fdt_property(fdt, "interrupt-controller", NULL, 0);  in fdt_add_gic()
189 	fdt_property(fdt, "msi-controller", NULL, 0);  in fdt_add_gic()
190 	/* XXX: Needed given the root #address-cells? */  in fdt_add_gic()
191 	fdt_property_u32(fdt, "#address-cells", 2);  in fdt_add_gic()
192 	fdt_property_u32(fdt, "#interrupt-cells", 3);  in fdt_add_gic()
201 	fdt_property_placeholder(fdt, "mbi-ranges", 2 * sizeof(uint32_t),  in fdt_add_gic()
208 	fdt_property_u32(fdt, "interrupt-parent", gic_phandle);  in fdt_add_gic()
229 	fdt_property_u32(fdt, "interrupt-parent", gic_phandle);  in fdt_add_uart()
233 	SET_PROP_U32(interrupts, 1, intr - GIC_FIRST_SPI);  in fdt_add_uart()
239 	fdt_property(fdt, "clock-names", UART_CLK_NAMES,  in fdt_add_uart()
269 	fdt_property_u32(fdt, "interrupt-parent", gic_phandle);  in fdt_add_rtc()
273 	SET_PROP_U32(interrupts, 1, intr - GIC_FIRST_SPI);  in fdt_add_rtc()
277 	fdt_property_string(fdt, "clock-names", "apb_pclk");  in fdt_add_rtc()
286 	uint32_t irqs[] = { 13, 14, 11 };  in fdt_add_timer()  local
293 	fdt_property_string(fdt, "compatible", "arm,armv8-timer");  in fdt_add_timer()
294 	fdt_property_u32(fdt, "interrupt-parent", gic_phandle);  in fdt_add_timer()
297 	for (u_int i = 0; i < nitems(irqs); i++) {  in fdt_add_timer()
299 		SET_PROP_U32(interrupts, i * 3 + 1, irqs[i]);  in fdt_add_timer()
316 	fdt_property_string(fdt, "compatible", "pci-host-ecam-generic");  in fdt_add_pcie()
317 	fdt_property_u32(fdt, "#address-cells", 3);  in fdt_add_pcie()
318 	fdt_property_u32(fdt, "#size-cells", 2);  in fdt_add_pcie()
320 	fdt_property_u64(fdt, "bus-range", (0ul << 32) | 1);  in fdt_add_pcie()
346 	fdt_property_placeholder(fdt, "msi-map", 4 * sizeof(uint32_t), &prop);  in fdt_add_pcie()
351 	fdt_property_u32(fdt, "msi-parent", gic_phandle);  in fdt_add_pcie()
353 	fdt_property_u32(fdt, "#interrupt-cells", 1);  in fdt_add_pcie()
354 	fdt_property_u32(fdt, "interrupt-parent", gic_phandle);  in fdt_add_pcie()
360 	fdt_property_placeholder(fdt, "interrupt-map-mask",  in fdt_add_pcie()
366 	fdt_property_placeholder(fdt, "interrupt-map",  in fdt_add_pcie()
381 		SET_PROP_U32(prop, 10 * i + 8, intr - GIC_FIRST_SPI);  in fdt_add_pcie()