Lines Matching full:dq
95 If \fBinput\fP is \(dq\fB\-\fP\(dq or omitted, \fBllvm\-mca\fP reads from standard
100 option specifies \(dq\fB\-\fP\(dq, then the output will also be sent to standard output.
155 of zero for this flag means \(dqunlimited number of physical registers\(dq.
343 The code from the example above defines a region named \(dqA simple example\(dq with a
395 __asm volatile(\(dq# LLVM\-MCA\-BEGIN foo\(dq:::\(dqmemory\(dq);
397 __asm volatile(\(dq# LLVM\-MCA\-END\(dq:::\(dqmemory\(dq);
1131 instructions that are \(dqin\-flight\(dq, and retiring them in program order. The
1183 \(dqready to retire.\(dq
1238 cache. It only knows if an instruction \(dqMayLoad\(dq and/or \(dqMayStore.\(dq For
1239 loads, the scheduling model provides an \(dqoptimistic\(dq load\-to\-use latency (which
1244 instruction\(aqs \(dqMayLoad\(dq, \(dqMayStore\(dq, and unmodeled side effects flags to
1257 \(dqexecuted\(dq when it becomes the oldest entry in the load/store queue(s). That