Lines Matching full:bus
34 #include <sys/bus.h>
63 legacy_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func,
66 return(pci_cfgregread(0, bus, slot, func, reg, bytes));
72 legacy_pcib_write_config(device_t dev, u_int bus, u_int slot, u_int func,
75 pci_cfgregwrite(0, bus, slot, func, reg, data, bytes);
99 device_t bus;
101 bus = device_get_parent(pcib);
102 return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
109 device_t bus;
111 bus = device_get_parent(pcib);
112 return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq));
119 device_t bus, hostb;
122 bus = device_get_parent(pcib);
123 error = PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data);
139 legacy_pcib_is_host_bridge(int bus, int slot, int func,
153 /* *busnum = legacy_pcib_read_config(0, bus, slot, func, 0x41, 1); */
154 *busnum = bus;
191 *busnum = legacy_pcib_read_config(0, bus, slot, func, 0x4a, 1);
200 * bus numbers for the PXB channels.
202 * Since the MIOC doesn't have a pci bus attached, we
205 pxb[0] = legacy_pcib_read_config(0, bus, slot, func,
207 pxb[1] = legacy_pcib_read_config(0, bus, slot, func,
209 pxb[2] = legacy_pcib_read_config(0, bus, slot, func,
211 pxb[3] = legacy_pcib_read_config(0, bus, slot, func,
217 s = "Intel 82454NX PXB#0, Bus#A";
221 s = "Intel 82454NX PXB#0, Bus#B";
225 s = "Intel 82454NX PXB#1, Bus#A";
229 s = "Intel 82454NX PXB#1, Bus#B";
302 *busnum = legacy_pcib_read_config(0, bus, slot, func, 0x44, 1);
313 *busnum = legacy_pcib_read_config(0, bus, slot, func, 0x44, 1);
318 *busnum = legacy_pcib_read_config(0, bus, slot, func, 0x44, 1);
323 *busnum = legacy_pcib_read_config(0, bus, slot, func, 0x44, 1);
330 *busnum = legacy_pcib_read_config(0, bus, slot, func, 0x44, 1);
340 *busnum = legacy_pcib_read_config(0, bus, slot, func, 0x44, 1);
346 *busnum = legacy_pcib_read_config(0, bus, slot, func, 0xc8, 1);
372 * Scan the first pci bus for host-pci bridges and add pcib instances
378 int bus, slot, func;
390 * Check to see if we haven't already had a PCI bus added
398 bus = 0;
402 hdrtype = legacy_pcib_read_config(0, bus, slot, func,
405 * When enumerating bus devices, the standard says that
427 id = legacy_pcib_read_config(0, bus, slot, func,
431 class = legacy_pcib_read_config(0, bus, slot, func,
433 subclass = legacy_pcib_read_config(0, bus, slot, func,
436 s = legacy_pcib_is_host_bridge(bus, slot, func,
443 * Check to see if the physical bus has already
445 * bridges to the same logical bus.
478 if (found824xx && bus == 0) {
479 bus++;
513 int bus;
515 bus = pcib_get_bus(dev);
520 if (pci_pir_probe(bus, 0)) {
652 /* Bus interface */
683 * PCI bus interface. This could be used to extract the
691 { 0x030ad041 /* PNP0A03 */, "PCI Bus" },
692 { 0x080ad041 /* PNP0A08 */, "PCIe Bus" },
728 static int pcibios_pcib_probe(device_t bus);
747 int bus;
752 bus = pci_read_config(dev, PCIR_SECBUS_1, 1);
753 if (bus == 0)
755 if (!pci_pir_probe(bus, 1))