Lines Matching defs:dmar
74 static void dmar_unref_domain_locked(struct dmar_unit *dmar,
78 static void dmar_free_ctx_locked(struct dmar_unit *dmar, struct dmar_ctx *ctx);
81 dmar_ensure_ctx_page(struct dmar_unit *dmar, int bus)
90 ctxm = iommu_pgalloc(dmar->ctx_obj, 1 + bus, IOMMU_PGF_NOALLOC);
101 ctxm = iommu_pgalloc(dmar->ctx_obj, 1 + bus, IOMMU_PGF_ZERO |
103 re = iommu_map_pgtbl(dmar->ctx_obj, 0, IOMMU_PGF_NOALLOC, &sf);
107 dmar_flush_root_to_ram(dmar, re);
115 struct dmar_unit *dmar;
118 dmar = CTX2DMAR(ctx);
120 ctxp = iommu_map_pgtbl(dmar->ctx_obj, 1 + PCI_RID2BUS(ctx->context.rid),
162 ("dmar%d: initialized ctx entry %d:%d:%d 0x%jx 0x%jx",
189 dmar_flush_for_ctx_entry(struct dmar_unit *dmar, bool force)
194 * If dmar declares Caching Mode as Set, follow 11.5 "Caching
198 if ((dmar->hw_cap & DMAR_CAP_CM) == 0 && !force)
200 if (dmar->qi_enabled) {
201 dmar_qi_invalidate_ctx_glob_locked(dmar);
202 if ((dmar->hw_ecap & DMAR_ECAP_DI) != 0 || force)
203 dmar_qi_invalidate_iotlb_glob_locked(dmar);
206 error = dmar_inv_ctx_glob(dmar);
207 if (error == 0 && ((dmar->hw_ecap & DMAR_ECAP_DI) != 0 || force))
208 error = dmar_inv_iotlb_glob(dmar);
244 printf("dmar%d ctx pci%d:%d:%d RMRR [%#jx, %#jx]\n",
255 printf("BIOS bug: dmar%d RMRR "
287 "dmar%d failed to map RMRR region (%jx, %jx) %d\n",
363 dmar_domain_alloc(struct dmar_unit *dmar, bool id_mapped)
370 id = alloc_unr(dmar->domids);
375 unit = DMAR2IOMMU(dmar);
380 domain->dmar = dmar;
389 mgaw = dmar_maxaddr2mgaw(dmar, domain->iodom.end, !id_mapped);
400 if ((dmar->hw_ecap & DMAR_ECAP_PT) == 0) {
472 struct dmar_unit *dmar;
495 dmar = DOM2DMAR(domain);
496 free_unr(dmar->domids, domain->domain);
501 dmar_get_ctx_for_dev1(struct dmar_unit *dmar, device_t dev, uint16_t rid,
524 unit = DMAR2IOMMU(dmar);
525 DMAR_LOCK(dmar);
527 ("iommu%d pci%d:%d:%d get_ctx for buswide", dmar->iommu.unit, bus,
529 ctx = dmar_find_ctx_locked(dmar, rid);
536 DMAR_UNLOCK(dmar);
537 dmar_ensure_ctx_page(dmar, PCI_RID2BUS(rid));
538 domain1 = dmar_domain_alloc(dmar, id_mapped);
557 DMAR_LOCK(dmar);
563 ctx = dmar_find_ctx_locked(dmar, rid);
576 if (LIST_EMPTY(&dmar->domains))
578 LIST_INSERT_HEAD(&dmar->domains, domain, link);
582 "dmar%d pci%d:%d:%d:%d rid %x domain %d mgaw %d "
584 dmar->iommu.unit, dmar->segment, bus, slot,
604 error = dmar_flush_for_ctx_entry(dmar, enable);
606 dmar_free_ctx_locked(dmar, ctx);
612 * The dmar lock was potentially dropped between check for the
616 if (enable && !rmrr_init && (dmar->hw_gcmd & DMAR_GCMD_TE) == 0) {
617 error = dmar_disable_protected_regions(dmar);
619 printf("dmar%d: Failed to disable protected regions\n",
620 dmar->iommu.unit);
621 error = dmar_enable_translation(dmar);
624 printf("dmar%d: enabled translation\n",
625 dmar->iommu.unit);
628 printf("dmar%d: enabling translation failed, "
629 "error %d\n", dmar->iommu.unit, error);
630 dmar_free_ctx_locked(dmar, ctx);
635 DMAR_UNLOCK(dmar);
641 dmar_get_ctx_for_dev(struct dmar_unit *dmar, device_t dev, uint16_t rid,
650 return (dmar_get_ctx_for_dev1(dmar, dev, rid, dev_domain, dev_busno,
655 dmar_get_ctx_for_devpath(struct dmar_unit *dmar, uint16_t rid,
661 return (dmar_get_ctx_for_dev1(dmar, NULL, rid, dev_domain, dev_busno,
668 struct dmar_unit *dmar;
674 dmar = domain->dmar;
685 DMAR_LOCK(dmar);
691 error = dmar_flush_for_ctx_entry(dmar, true);
693 printf("dmar%d rid %x domain %d->%d %s-mapped\n",
694 dmar->iommu.unit, ctx->context.rid, old_domain->domain,
697 dmar_unref_domain_locked(dmar, old_domain);
703 dmar_unref_domain_locked(struct dmar_unit *dmar, struct dmar_domain *domain)
706 DMAR_ASSERT_LOCKED(dmar);
708 ("dmar %d domain %p refs %u", dmar->iommu.unit, domain,
711 ("dmar %d domain %p refs %d ctx_cnt %d", dmar->iommu.unit, domain,
716 DMAR_UNLOCK(dmar);
724 DMAR_UNLOCK(dmar);
726 taskqueue_drain(dmar->iommu.delayed_taskqueue,
732 dmar_free_ctx_locked(struct dmar_unit *dmar, struct dmar_ctx *ctx)
738 DMAR_ASSERT_LOCKED(dmar);
740 ("dmar %p ctx %p refs %u", dmar, ctx, ctx->context.refs));
748 DMAR_UNLOCK(dmar);
758 * entries page could require sleep, unlock the dmar.
760 DMAR_UNLOCK(dmar);
763 DMAR_LOCK(dmar);
765 ("dmar %p ctx %p refs %u", dmar, ctx, ctx->context.refs));
773 DMAR_UNLOCK(dmar);
788 dmar_flush_ctx_to_ram(dmar, ctxp);
789 dmar_inv_ctx_glob(dmar);
790 if ((dmar->hw_ecap & DMAR_ECAP_DI) != 0) {
791 if (dmar->qi_enabled)
792 dmar_qi_invalidate_iotlb_glob_locked(dmar);
794 dmar_inv_iotlb_glob(dmar);
801 dmar_unref_domain_locked(dmar, domain);
809 dmar_find_ctx_locked(struct dmar_unit *dmar, uint16_t rid)
814 DMAR_ASSERT_LOCKED(dmar);
816 LIST_FOREACH(domain, &dmar->domains, link) {
914 struct dmar_unit *dmar;
917 dmar = IOMMU2DMAR(iommu);
918 ret = dmar_get_ctx_for_dev(dmar, dev, rid, id_mapped, rmrr_init);
926 struct dmar_unit *dmar;
929 dmar = IOMMU2DMAR(iommu);
931 dmar_free_ctx_locked(dmar, ctx);