Lines Matching +full:max +full:- +full:bits +full:- +full:per +full:- +full:word

3 /*-
4  * SPDX-License-Identifier: (BSD-2-Clause AND ISC)
62 /* Max name length of a pin */
68 #define GPIO_PIN_OPENDRAIN	0x00000004	/* open-drain output */
69 #define GPIO_PIN_PUSHPULL	0x00000008	/* push-pull output */
71 #define GPIO_PIN_PULLUP		0x00000020	/* internal pull-up enabled */
72 #define GPIO_PIN_PULLDOWN	0x00000040	/* internal pull-down enabled */
93 	char gp_name[GPIOMAXNAME];		/* human-readable name */
105  * Reporting gpio pin-change per-event details to userland.
108  * more of these structures (or will return EWOULDBLOCK in non-blocking IO mode
118  * Reporting gpio pin-change summary data to userland.
121  * or more of these structures (or will return EWOULDBLOCK in non-blocking IO
140  * a per-open-descriptor basis.
159  * bits in the arguments is device-specific.  It is expected that lower-numbered
160  * pins in the device's number space map linearly to lower-ordered bits within
161  * the 32-bit words (i.e., bit 0 is first_pin, bit 1 is first_pin+1, etc).
165  * 32 or some other hardware-specific number; to access pin 2 would require
166  * first_pin to be zero and then manipulate bit (1 << 2) in the 32-bit word.
200  * way that bits are mapped by pin_access_32(), and the same restrictions may
207  * 32 or some other hardware-specific number.  Invalid values in first_pin or
210  * You cannot configure interrupts (userland pin-change notifications) with