Lines Matching +full:lock +full:- +full:step

1 /*-
2  * SPDX-License-Identifier: BSD-4-Clause
40  * Machine State Register (MSR) - All cores
43 #define	PSL_VSX		0x00800000UL	/* Vector-Scalar unit available */
53 /* Machine State Register - Book-E cores */
55 #define	PSL_CM		0x80000000UL	/* Computation Mode (64-bit) */
59 #define PSL_UCLE	0x04000000UL	/* User mode cache lock enable */
62 #define PSL_UBLE	0x00000400UL	/* BTB lock enable - e500 only */
63 #define PSL_DWE		0x00000400UL	/* Debug Wait Enable - 440 only*/
68 /* Machine State Register (MSR) - AIM cores */
70 #define PSL_SF		0x8000000000000000UL	/* 64-bit addressing */
71 #define PSL_HV		0x1000000000000000UL	/* hyper-privileged mode */
76 #define	PSL_SE		0x00000400UL	/* single-step trace enable */
78 #define	PSL_IP		0x00000040UL	/* interrupt prefix - 601 only */
84  * Floating-point exception modes:
87 #define	PSL_FE_NONREC	PSL_FE1		/* imprecise non-recoverable */
96 extern register_t psl_userset32;	/* Default user MSR values for 32-bit */