1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
11  * 1. Redistributions of source code must retain the above copyright
79 		__asm __volatile("ld %0, 16(%2); sync; isync;	\  in cpudep_ap_early_bootstrap()
80 		    mtspr %1, %0; sync; isync;"  in cpudep_ap_early_bootstrap()
82 		__asm __volatile("ld %0, 24(%2); sync; isync;	\  in cpudep_ap_early_bootstrap()
83 		    mtspr %1, %0; sync; isync;"  in cpudep_ap_early_bootstrap()
106 			 * Nuke FSCR, to be managed on a per-process basis  in cpudep_ap_early_bootstrap()
127 	pcpup->pc_curthread = pcpup->pc_idlethread;  in cpudep_ap_bootstrap()
129 	__asm __volatile("mr 13,%0" :: "r"(pcpup->pc_curthread));  in cpudep_ap_bootstrap()
131 	__asm __volatile("mr 2,%0" :: "r"(pcpup->pc_curthread));  in cpudep_ap_bootstrap()
133 	pcpup->pc_curpcb = pcpup->pc_curthread->td_pcb;  in cpudep_ap_bootstrap()
134 	sp = pcpup->pc_curpcb->pcb_sp;  in cpudep_ap_bootstrap()
215 	/* Enable L1 D-cache */  in mpc74xx_l1d_enable()
233 	/* Enable L1 I-cache */  in mpc74xx_l1i_enable()
255 		bsp_state[1] = mfspr(SPR_HID1);  in cpudep_save_config()
259 		__asm __volatile ("mfspr %0,%2; mr %1,%0; srdi %0,%0,32"  in cpudep_save_config()
260 		    : "=r" (bsp_state[0]),"=r" (bsp_state[1]) : "K" (SPR_HID0));  in cpudep_save_config()
261 		__asm __volatile ("mfspr %0,%2; mr %1,%0; srdi %0,%0,32"  in cpudep_save_config()
263 		__asm __volatile ("mfspr %0,%2; mr %1,%0; srdi %0,%0,32"  in cpudep_save_config()
265 		__asm __volatile ("mfspr %0,%2; mr %1,%0; srdi %0,%0,32"  in cpudep_save_config()
276 			bsp_state[1] = mfspr(SPR_HID1);  in cpudep_save_config()
299 		bsp_state[1] = mfspr(SPR_HID1);  in cpudep_save_config()
321 		 * See Table 2-3, 970MP manual  in cpudep_ap_setup()
327 		__asm __volatile("mtasr %0; sync" :: "r"(0));  in cpudep_ap_setup()
330 			sync; isync;					\  in cpudep_ap_setup()
331 			mtspr	%1, %0;					\  in cpudep_ap_setup()
332 			mfspr	%0, %1;	mfspr	%0, %1;	mfspr	%0, %1;	\  in cpudep_ap_setup()
333 			mfspr	%0, %1;	mfspr	%0, %1;	mfspr	%0, %1; \  in cpudep_ap_setup()
334 			sync; isync"   in cpudep_ap_setup()
336 		__asm __volatile("sync; isync;	\  in cpudep_ap_setup()
337 		    mtspr %1, %0; mtspr %1, %0; sync; isync"  in cpudep_ap_setup()
338 		    :: "r"(bsp_state[1]), "K"(SPR_HID1));  in cpudep_ap_setup()
342 			sync; isync;					\  in cpudep_ap_setup()
343 			mtspr	%1, %0;					\  in cpudep_ap_setup()
344 			mfspr	%0, %1;	mfspr	%0, %1;	mfspr	%0, %1;	\  in cpudep_ap_setup()
345 			mfspr	%0, %1;	mfspr	%0, %1;	mfspr	%0, %1; \  in cpudep_ap_setup()
346 			sync; isync"   in cpudep_ap_setup()
348 		__asm __volatile("ld %0, 8(%2); sync; isync;	\  in cpudep_ap_setup()
349 		    mtspr %1, %0; mtspr %1, %0; sync; isync"  in cpudep_ap_setup()
359 			mtspr(SPR_HID1, bsp_state[1]);  in cpudep_ap_setup()
384 		mtspr(SPR_HID1, bsp_state[1]); isync();  in cpudep_ap_setup()