Lines Matching full:enables
14 # The apic device enables the use of the I/O APIC for interrupt delivery.
59 # CPU_BLUELIGHTNING_3X enables triple-clock mode on IBM Blue Lightning
63 # CPU_BLUELIGHTNING_FPU_OP_CACHE enables FPU operand cache on IBM
67 # CPU_BTB_EN enables branch target buffer on Cyrix 5x86 (NOTE 1).
69 # CPU_CYRIX_NO_LOCK enables weak locking for the entire address space
76 # CPU_DISABLE_5X86_LSSER disables load store serialize (i.e., enables
80 # CPU_ELAN enables support for AMDs ElanSC520 CPU.
81 # CPU_ELAN_PPS enables precision timestamp code.
84 # CPU_ENABLE_LONGRUN enables support for Transmeta Crusoe LongRun
88 # CPU_FASTER_5X86_FPU enables faster FPU exception handler.
93 # CPU_I486_ON_386 enables CPU cache on i486 based CPU upgrade products
108 # CPU_PPRO2CELERON enables L2 cache of Mendocino Celeron CPUs. This option
112 # CPU_RSTK_EN enables return stack on Cyrix 5x86 (NOTE 1).
114 # CPU_SOEKRIS enables support www.soekris.com hardware.
116 # CPU_SUSP_HLT enables suspend on HALT. If this option is set, CPU
121 # CPU_WT_ALLOC enables write allocation on Cyrix 6x86/6x86MX and AMD
124 # CYRIX_CACHE_WORKS enables CPU cache on Cyrix 486 CPUs with cache
127 # CYRIX_CACHE_REALLY_WORKS enables (1) CPU cache on Cyrix 486 CPUs