Lines Matching +full:map +full:- +full:to +full:- +full:dma +full:- +full:channel
7 * its contributors may be used to endorse or promote products derived
28 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
33 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
53 * along with this program; if not, write to the Free Software
55 * MA 02110-1301, USA.
58 *------------------------------------------------------------------
61 /dts-v1/;
66 #address-cells = <1>;
67 #size-cells = <1>;
79 #address-cells = <1>;
80 #size-cells = <0>;
85 d-cache-line-size = <32>; // 32 bytes
86 i-cache-line-size = <32>; // 32 bytes
87 d-cache-size = <0x8000>; // L1, 32K
88 i-cache-size = <0x8000>; // L1, 32K
89 timebase-frequency = <0>; // 33 MHz, from uboot
90 bus-frequency = <0>; // 166 MHz
91 clock-frequency = <0>; // 825 MHz, from uboot
92 next-level-cache = <&L2>;
102 #address-cells = <2>;
103 #size-cells = <1>;
107 interrupt-parent = <&mpic>;
114 #address-cells = <1>;
115 #size-cells = <1>;
116 compatible = "cfi-flash";
118 bank-width = <2>;
119 device-width = <1>;
123 #address-cells = <1>;
124 #size-cells = <1>;
125 compatible = "cfi-flash";
127 bank-width = <2>;
128 device-width = <1>;
132 #address-cells = <1>;
133 #size-cells = <1>;
136 bank-width = <1>;
137 device-width = <1>;
142 #address-cells = <1>;
143 #size-cells = <1>;
145 compatible = "simple-bus";
147 bus-frequency = <0>;
149 ecm-law@0 {
150 compatible = "fsl,ecm-law";
152 fsl,num-laws = <8>;
156 compatible = "fsl,mpc8555-ecm", "fsl,ecm";
159 interrupt-parent = <&mpic>;
162 memory-controller@2000 {
163 compatible = "fsl,8555-memory-controller";
165 interrupt-parent = <&mpic>;
169 L2: l2-cache-controller@20000 {
170 compatible = "fsl,8555-l2-cache-controller";
172 cache-line-size = <32>; // 32 bytes
173 cache-size = <0x40000>; // L2, 256K
174 interrupt-parent = <&mpic>;
179 #address-cells = <1>;
180 #size-cells = <0>;
181 cell-index = <0>;
182 compatible = "fsl-i2c";
185 interrupt-parent = <&mpic>;
189 dma@21300 {
190 #address-cells = <1>;
191 #size-cells = <1>;
192 compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma";
195 cell-index = <0>;
196 dma-channel@0 {
197 compatible = "fsl,mpc8555-dma-channel",
198 "fsl,eloplus-dma-channel";
200 cell-index = <0>;
201 interrupt-parent = <&mpic>;
204 dma-channel@80 {
205 compatible = "fsl,mpc8555-dma-channel",
206 "fsl,eloplus-dma-channel";
208 cell-index = <1>;
209 interrupt-parent = <&mpic>;
212 dma-channel@100 {
213 compatible = "fsl,mpc8555-dma-channel",
214 "fsl,eloplus-dma-channel";
216 cell-index = <2>;
217 interrupt-parent = <&mpic>;
220 dma-channel@180 {
221 compatible = "fsl,mpc8555-dma-channel",
222 "fsl,eloplus-dma-channel";
224 cell-index = <3>;
225 interrupt-parent = <&mpic>;
231 #address-cells = <1>;
232 #size-cells = <1>;
233 cell-index = <0>;
239 local-mac-address = [ 00 00 00 00 00 00 ];
241 interrupt-parent = <&mpic>;
242 tbi-handle = <&tbi0>;
243 phy-handle = <&phy0>;
246 #address-cells = <1>;
247 #size-cells = <0>;
248 compatible = "fsl,gianfar-mdio";
251 phy0: ethernet-phy@0 {
252 interrupt-parent = <&mpic>;
255 device_type = "ethernet-phy";
257 phy1: ethernet-phy@1 {
258 interrupt-parent = <&mpic>;
261 device_type = "ethernet-phy";
263 tbi0: tbi-phy@11 {
265 device_type = "tbi-phy";
271 #address-cells = <1>;
272 #size-cells = <1>;
273 cell-index = <1>;
279 local-mac-address = [ 00 00 00 00 00 00 ];
281 interrupt-parent = <&mpic>;
282 tbi-handle = <&tbi1>;
283 phy-handle = <&phy1>;
286 #address-cells = <1>;
287 #size-cells = <0>;
288 compatible = "fsl,gianfar-tbi";
291 tbi1: tbi-phy@11 {
293 device_type = "tbi-phy";
299 cell-index = <0>;
303 clock-frequency = <0>; // should we fill in in uboot?
305 interrupt-parent = <&mpic>;
309 cell-index = <1>;
313 clock-frequency = <0>; // should we fill in in uboot?
315 interrupt-parent = <&mpic>;
322 interrupt-parent = <&mpic>;
323 fsl,num-channels = <4>;
324 fsl,channel-fifo-len = <24>;
325 fsl,exec-units-mask = <0x7e>;
326 fsl,descriptor-types-mask = <0x01010ebf>;
330 interrupt-controller;
331 #address-cells = <0>;
332 #interrupt-cells = <2>;
334 compatible = "chrp,open-pic";
335 device_type = "open-pic";
339 #address-cells = <1>;
340 #size-cells = <1>;
341 compatible = "fsl,mpc8555-cpm", "fsl,cpm2";
344 interrupt-parent = <&mpic>;
349 interrupt-map-mask = <0x1f800 0x0 0x0 0x7>;
350 interrupt-map = <
394 interrupt-parent = <&mpic>;
396 bus-range = <0 0>;
399 clock-frequency = <66666666>;
400 #interrupt-cells = <1>;
401 #size-cells = <2>;
402 #address-cells = <3>;
404 compatible = "fsl,mpc8540-pci";
408 interrupt-controller;
409 device_type = "interrupt-controller";
411 #address-cells = <0>;
412 #interrupt-cells = <2>;
415 interrupt-parent = <&pci0>;
420 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
421 interrupt-map = <
428 interrupt-parent = <&mpic>;
430 bus-range = <0 0>;
433 clock-frequency = <66666666>;
434 #interrupt-cells = <1>;
435 #size-cells = <2>;
436 #address-cells = <3>;
438 compatible = "fsl,mpc8540-pci";