Lines Matching full:rf
831 /* retrieve RF rev. no and various other things from EEPROM */
835 "MAC/BBP RT%04X (rev 0x%04X), RF %s (MIMO %dT%dR), address %s\n",
1890 /* read vendor RF settings */
1894 sc->rf[i].val = val & 0xff;
1895 sc->rf[i].reg = val >> 8;
1896 RUN_DPRINTF(sc, RUN_DEBUG_ROM, "RF%d=0x%02x\n",
1897 sc->rf[i].reg, sc->rf[i].val);
1902 /* read RF frequency offset from EEPROM */
1931 /* read RF information */
1965 RUN_DPRINTF(sc, RUN_DEBUG_ROM, "EEPROM RF rev=0x%04x chains=%dT%dR\n",
1968 /* check if RF supports automatic Tx access gain control */
1977 /* check if RF supports automatic Tx access gain control */
3978 /* RF IQ compensation control. */
3984 /* RF IQ imbalance compensation control. */
4174 /* Initialize RF R3 and R4. */
4226 uint8_t rf;
4238 /* RT3370/RT3390: RF R3 [7:4] is not reserved bits. */
4239 run_rt3070_rf_read(sc, 3, &rf);
4240 rf = (rf & ~0x0f) | rt3070_freqs[i].k;
4241 run_rt3070_rf_write(sc, 3, rf);
4243 run_rt3070_rf_read(sc, 6, &rf);
4244 rf = (rf & ~0x03) | rt3070_freqs[i].r;
4245 run_rt3070_rf_write(sc, 6, rf);
4248 run_rt3070_rf_read(sc, 12, &rf);
4249 rf = (rf & ~0x1f) | txpow1;
4250 run_rt3070_rf_write(sc, 12, rf);
4253 run_rt3070_rf_read(sc, 13, &rf);
4254 rf = (rf & ~0x1f) | txpow2;
4255 run_rt3070_rf_write(sc, 13, rf);
4257 run_rt3070_rf_read(sc, 1, &rf);
4258 rf &= ~0xfc;
4260 rf |= 1 << 7 | 1 << 5; /* 1T: disable Tx chains 2 & 3 */
4262 rf |= 1 << 7; /* 2T: disable Tx chain 3 */
4264 rf |= 1 << 6 | 1 << 4; /* 1R: disable Rx chains 2 & 3 */
4266 rf |= 1 << 6; /* 2R: disable Rx chain 3 */
4267 run_rt3070_rf_write(sc, 1, rf);
4269 /* set RF offset */
4270 run_rt3070_rf_read(sc, 23, &rf);
4271 rf = (rf & ~0x7f) | sc->freq;
4272 run_rt3070_rf_write(sc, 23, rf);
4274 /* program RF filter */
4275 run_rt3070_rf_read(sc, 24, &rf); /* Tx */
4276 rf = (rf & ~0x3f) | sc->rf24_20mhz;
4277 run_rt3070_rf_write(sc, 24, rf);
4278 run_rt3070_rf_read(sc, 31, &rf); /* Rx */
4279 rf = (rf & ~0x3f) | sc->rf24_20mhz;
4280 run_rt3070_rf_write(sc, 31, rf);
4282 /* enable RF tuning */
4283 run_rt3070_rf_read(sc, 7, &rf);
4284 run_rt3070_rf_write(sc, 7, rf | 0x01);
4292 uint8_t rf;
4313 run_rt3070_rf_read(sc, 6, &rf);
4314 rf = (rf & ~0x0f) | rt3070_freqs[i].r;
4315 rf |= (chan <= 14) ? 0x08 : 0x04;
4316 run_rt3070_rf_write(sc, 6, rf);
4319 run_rt3070_rf_read(sc, 5, &rf);
4320 rf &= ~(0x08 | 0x04);
4321 rf |= (chan <= 14) ? 0x04 : 0x08;
4322 run_rt3070_rf_write(sc, 5, rf);
4326 rf = 0x60 | txpow1;
4328 rf = 0xe0 | (txpow1 & 0xc) << 1 | (txpow1 & 0x3);
4329 run_rt3070_rf_write(sc, 12, rf);
4333 rf = 0x60 | txpow2;
4335 rf = 0xe0 | (txpow2 & 0xc) << 1 | (txpow2 & 0x3);
4336 run_rt3070_rf_write(sc, 13, rf);
4339 run_rt3070_rf_read(sc, 1, &rf);
4340 rf &= ~0xfc;
4342 rf |= 1 << 7 | 1 << 5; /* 1T: disable Tx chains 2 & 3 */
4344 rf |= 1 << 7; /* 2T: disable Tx chain 3 */
4346 rf |= 1 << 6 | 1 << 4; /* 1R: disable Rx chains 2 & 3 */
4348 rf |= 1 << 6; /* 2R: disable Rx chain 3 */
4349 run_rt3070_rf_write(sc, 1, rf);
4351 /* set RF offset */
4352 run_rt3070_rf_read(sc, 23, &rf);
4353 rf = (rf & ~0x7f) | sc->freq;
4354 run_rt3070_rf_write(sc, 23, rf);
4356 /* program RF filter */
4357 rf = sc->rf24_20mhz;
4358 run_rt3070_rf_write(sc, 24, rf); /* Tx */
4359 run_rt3070_rf_write(sc, 31, rf); /* Rx */
4361 /* enable RF tuning */
4362 run_rt3070_rf_read(sc, 7, &rf);
4363 rf = (chan <= 14) ? 0xd8 : ((rf & ~0xc8) | 0x14);
4364 run_rt3070_rf_write(sc, 7, rf);
4367 rf = (chan <= 14) ? 0xc3 : 0xc0;
4368 run_rt3070_rf_write(sc, 9, rf);
4379 rf = 0x48 | sc->txmixgain_2ghz;
4381 rf = 0x78 | sc->txmixgain_5ghz;
4382 run_rt3070_rf_write(sc, 16, rf);
4388 rf = 0x93;
4390 rf = 0xb7;
4392 rf = 0x74;
4394 rf = 0x72;
4395 run_rt3070_rf_write(sc, 19, rf);
4399 rf = 0xb3;
4401 rf = 0xf6;
4403 rf = 0xf4;
4405 rf = 0xf3;
4406 run_rt3070_rf_write(sc, 20, rf);
4410 rf = 0x15;
4412 rf = 0x3d;
4414 rf = 0x01;
4415 run_rt3070_rf_write(sc, 25, rf);
4430 /* enable RF tuning */
4431 run_rt3070_rf_read(sc, 7, &rf);
4432 run_rt3070_rf_write(sc, 7, rf | 0x01);
4441 uint8_t h20mhz, rf;
4463 run_rt3070_rf_read(sc, 11, &rf);
4464 rf = (rf & ~0x03) | (rt3070_freqs[i].r & 0x03);
4465 run_rt3070_rf_write(sc, 11, rf);
4468 run_rt3070_rf_read(sc, 11, &rf);
4469 rf &= ~0x4c;
4470 rf |= (chan <= 14) ? 0x44 : 0x48;
4471 run_rt3070_rf_write(sc, 11, rf);
4474 rf = txpow1 & 0x1f;
4476 rf = 0x40 | ((txpow1 & 0x18) << 1) | (txpow1 & 0x07);
4477 run_rt3070_rf_write(sc, 53, rf);
4480 rf = txpow2 & 0x1f;
4482 rf = 0x40 | ((txpow2 & 0x18) << 1) | (txpow2 & 0x07);
4483 run_rt3070_rf_write(sc, 55, rf);
4486 rf = txpow3 & 0x1f;
4488 rf = 0x40 | ((txpow3 & 0x18) << 1) | (txpow3 & 0x07);
4489 run_rt3070_rf_write(sc, 54, rf);
4491 rf = RT3070_RF_BLOCK | RT3070_PLL_PD;
4493 rf |= RT3070_TX0_PD | RT3070_TX1_PD | RT3070_TX2_PD;
4495 rf |= RT3070_TX0_PD | RT3070_TX1_PD;
4496 rf |= RT3070_RX0_PD | RT3070_RX1_PD | RT3070_RX2_PD;
4497 run_rt3070_rf_write(sc, 1, rf);
4504 run_rt3070_rf_read(sc, 30, &rf);
4505 rf = (rf & ~0x06) | (h20mhz << 1) | (h20mhz << 2);
4506 run_rt3070_rf_write(sc, 30, rf);
4508 run_rt3070_rf_read(sc, 36, &rf);
4510 rf |= 0x80;
4512 rf &= ~0x80;
4513 run_rt3070_rf_write(sc, 36, rf);
4521 run_rt3070_rf_read(sc, 6, &rf);
4522 rf &= ~0xc0;
4524 rf |= 0x40;
4526 rf |= 0x80;
4528 rf |= 0x40;
4529 run_rt3070_rf_write(sc, 6, rf);
4531 run_rt3070_rf_read(sc, 30, &rf);
4532 rf = (rf & ~0x18) | 0x10;
4533 run_rt3070_rf_write(sc, 30, rf);
4538 run_rt3070_rf_read(sc, 51, &rf);
4539 rf = (rf & ~0x03) | 0x01;
4540 run_rt3070_rf_write(sc, 51, rf);
4542 run_rt3070_rf_read(sc, 51, &rf);
4543 rf &= ~0x1c;
4544 rf |= (chan <= 14) ? 0x14 : 0x10;
4545 run_rt3070_rf_write(sc, 51, rf);
4547 run_rt3070_rf_read(sc, 51, &rf);
4548 rf &= ~0xe0;
4549 rf |= (chan <= 14) ? 0x60 : 0x40;
4550 run_rt3070_rf_write(sc, 51, rf);
4552 run_rt3070_rf_read(sc, 49, &rf);
4553 rf &= ~0x1c;
4554 rf |= (chan <= 14) ? 0x0c : 0x08;
4555 run_rt3070_rf_write(sc, 49, rf);
4557 run_rt3070_rf_read(sc, 50, &rf);
4558 run_rt3070_rf_write(sc, 50, rf & ~0x20);
4560 run_rt3070_rf_read(sc, 57, &rf);
4561 rf &= ~0xfc;
4562 rf |= (chan <= 14) ? 0x6c : 0x3c;
4563 run_rt3070_rf_write(sc, 57, rf);
4569 run_rt3070_rf_read(sc, 3, &rf);
4570 rf &= ~RT5390_VCOCAL;
4571 rf |= (chan <= 14) ? RT5390_VCOCAL : 0xbe;
4572 run_rt3070_rf_write(sc, 3, rf);
4575 rf = 0x23;
4577 rf = 0x36;
4579 rf = 0x32;
4581 rf = 0x30;
4582 run_rt3070_rf_write(sc, 39, rf);
4584 rf = 0xbb;
4586 rf = 0xeb;
4588 rf = 0xb3;
4590 rf = 0x9b;
4591 run_rt3070_rf_write(sc, 45, rf);
4601 uint8_t rf;
4613 run_rt3070_rf_read(sc, 11, &rf);
4614 rf = (rf & ~0x03) | (rt3070_freqs[i].r & 0x03);
4615 run_rt3070_rf_write(sc, 11, rf);
4617 run_rt3070_rf_read(sc, 49, &rf);
4618 rf = (rf & ~0x3f) | (txpow1 & 0x3f);
4619 /* The valid range of the RF R49 is 0x00 to 0x27. */
4620 if ((rf & 0x3f) > 0x27)
4621 rf = (rf & ~0x3f) | 0x27;
4622 run_rt3070_rf_write(sc, 49, rf);
4625 run_rt3070_rf_read(sc, 50, &rf);
4626 rf = (rf & ~0x3f) | (txpow2 & 0x3f);
4627 /* The valid range of the RF R50 is 0x00 to 0x27. */
4628 if ((rf & 0x3f) > 0x27)
4629 rf = (rf & ~0x3f) | 0x27;
4630 run_rt3070_rf_write(sc, 50, rf);
4633 run_rt3070_rf_read(sc, 1, &rf);
4634 rf |= RT3070_RF_BLOCK | RT3070_PLL_PD | RT3070_RX0_PD | RT3070_TX0_PD;
4636 rf |= RT3070_RX1_PD | RT3070_TX1_PD;
4637 run_rt3070_rf_write(sc, 1, rf);
4640 run_rt3070_rf_read(sc, 2, &rf);
4641 rf |= 0x80;
4642 run_rt3070_rf_write(sc, 2, rf);
4644 rf &= 0x7f;
4645 run_rt3070_rf_write(sc, 2, rf);
4654 rf = 0x0f;
4656 rf = 0x0e;
4658 rf = 0x0d;
4659 run_rt3070_rf_write(sc, 23, rf);
4662 rf = 0x0c;
4664 rf = 0x0b;
4666 rf = 0x0a;
4668 rf = 0x09;
4670 rf = 0x08;
4671 run_rt3070_rf_write(sc, 59, rf);
4674 rf = 0x0f;
4676 rf = 0x0b;
4677 run_rt3070_rf_write(sc, 59, rf);
4683 rf = 0x43;
4685 rf = 0x23;
4686 run_rt3070_rf_write(sc, 55, rf);
4689 rf = 0x0f;
4691 rf = 0x0d;
4693 rf = 0x0b;
4694 run_rt3070_rf_write(sc, 59, rf);
4702 run_rt3070_rf_read(sc, 3, &rf);
4703 rf |= RT5390_VCOCAL;
4704 run_rt3070_rf_write(sc, 3, rf);
4712 uint8_t reg, rf, txpow_bound;
4735 run_rt3070_rf_read(sc, 9, &rf);
4736 rf &= ~(1 << 4);
4737 rf |= ((freqs->n & 0x0100) >> 8) << 4;
4738 run_rt3070_rf_write(sc, 9, rf);
4741 run_rt3070_rf_read(sc, 9, &rf);
4742 rf &= ~0x0f;
4743 rf |= (freqs->k & 0x0f);
4744 run_rt3070_rf_write(sc, 9, rf);
4747 run_rt3070_rf_read(sc, 11, &rf);
4748 rf &= ~0x0c;
4749 rf |= ((freqs->m - 0x8) & 0x3) << 2;
4750 run_rt3070_rf_write(sc, 11, rf);
4751 run_rt3070_rf_read(sc, 9, &rf);
4752 rf &= ~(1 << 7);
4753 rf |= (((freqs->m - 0x8) & 0x4) >> 2) << 7;
4754 run_rt3070_rf_write(sc, 9, rf);
4757 run_rt3070_rf_read(sc, 11, &rf);
4758 rf &= ~0x03;
4759 rf |= (freqs->r - 0x1);
4760 run_rt3070_rf_write(sc, 11, rf);
4763 /* Initialize RF registers for 2GHZ. */
4769 rf = (chan <= 10) ? 0x07 : 0x06;
4770 run_rt3070_rf_write(sc, 23, rf);
4771 run_rt3070_rf_write(sc, 59, rf);
4776 * RF R49/R50 Tx power ALC code.
4782 /* Initialize RF registers for 5GHZ. */
4796 * RF R49/R50 Tx power ALC code.
4803 /* RF R49 ch0 Tx power ALC code. */
4804 run_rt3070_rf_read(sc, 49, &rf);
4805 rf &= ~0xc0;
4806 rf |= (reg << 6);
4807 rf = (rf & ~0x3f) | (txpow1 & 0x3f);
4808 if ((rf & 0x3f) > txpow_bound)
4809 rf = (rf & ~0x3f) | txpow_bound;
4810 run_rt3070_rf_write(sc, 49, rf);
4812 /* RF R50 ch1 Tx power ALC code. */
4813 run_rt3070_rf_read(sc, 50, &rf);
4814 rf &= ~(1 << 7 | 1 << 6);
4815 rf |= (reg << 6);
4816 rf = (rf & ~0x3f) | (txpow2 & 0x3f);
4817 if ((rf & 0x3f) > txpow_bound)
4818 rf = (rf & ~0x3f) | txpow_bound;
4819 run_rt3070_rf_write(sc, 50, rf);
4822 run_rt3070_rf_read(sc, 1, &rf);
4823 rf |= (RT3070_RF_BLOCK | RT3070_PLL_PD | RT3070_RX0_PD | RT3070_TX0_PD);
4825 rf |= RT3070_TX1_PD;
4827 rf |= RT3070_RX1_PD;
4828 run_rt3070_rf_write(sc, 1, rf);
4839 run_rt3070_rf_read(sc, 3, &rf);
4840 rf |= RT5390_VCOCAL;
4841 run_rt3070_rf_write(sc, 3, rf);
5516 uint8_t bbp4, mingain, rf, target;
5519 run_rt3070_rf_read(sc, 30, &rf);
5520 /* toggle RF R30 bit 7 */
5521 run_rt3070_rf_write(sc, 30, rf | 0x80);
5523 run_rt3070_rf_write(sc, 30, rf & ~0x80);
5525 /* initialize RF registers to default value */
5549 run_rt3070_rf_read(sc, 6, &rf);
5550 run_rt3070_rf_write(sc, 6, rf | 0x40);
5566 run_rt3070_rf_read(sc, 6, &rf);
5567 run_rt3070_rf_write(sc, 6, rf | 0x40);
5583 run_rt3070_rf_read(sc, 31, &rf);
5584 run_rt3070_rf_write(sc, 31, rf & ~0x20);
5594 run_rt3070_rf_read(sc, 31, &rf);
5595 run_rt3070_rf_write(sc, 31, rf | 0x20);
5617 run_rt3070_rf_read(sc, 17, &rf);
5618 rf &= ~RT3070_TX_LO1;
5622 rf |= 0x20; /* fix for long range Rx issue */
5625 rf = (rf & ~0x7) | sc->txmixgain_2ghz;
5626 run_rt3070_rf_write(sc, 17, rf);
5630 run_rt3070_rf_read(sc, 1, &rf);
5631 rf &= ~(RT3070_RX0_PD | RT3070_TX0_PD);
5632 rf |= RT3070_RF_BLOCK | RT3070_RX1_PD | RT3070_TX1_PD;
5633 run_rt3070_rf_write(sc, 1, rf);
5635 run_rt3070_rf_read(sc, 15, &rf);
5636 run_rt3070_rf_write(sc, 15, rf & ~RT3070_TX_LO2);
5638 run_rt3070_rf_read(sc, 20, &rf);
5639 run_rt3070_rf_write(sc, 20, rf & ~RT3070_RX_LO1);
5641 run_rt3070_rf_read(sc, 21, &rf);
5642 run_rt3070_rf_write(sc, 21, rf & ~RT3070_RX_LO2);
5646 /* fix Tx to Rx IQ glitch by raising RF voltage */
5647 run_rt3070_rf_read(sc, 27, &rf);
5648 rf &= ~0x77;
5650 rf |= 0x03;
5651 run_rt3070_rf_write(sc, 27, rf);
5660 uint8_t rf;
5668 /* Initialize RF registers to default value. */
5674 /* Toggle RF R2 to initiate calibration. */
5677 /* Initialize RF frequency offset. */
5680 run_rt3070_rf_read(sc, 18, &rf);
5681 run_rt3070_rf_write(sc, 18, rf | RT3593_AUTOTUNE_BYPASS);
5709 uint8_t rf;
5712 /* Toggle RF R2 to initiate calibration. */
5714 run_rt3070_rf_read(sc, 2, &rf);
5715 run_rt3070_rf_write(sc, 2, rf | RT5390_RESCAL);
5717 run_rt3070_rf_write(sc, 2, rf & ~RT5390_RESCAL);
5723 /* Initialize RF registers to default value. */
5729 /* Initialize RF frequency offset. */
5837 uint8_t bbp, rf;
5858 run_rt3070_rf_read(sc, 16, &rf);
5859 rf = (rf & ~0x07) | sc->txmixgain_2ghz;
5860 run_rt3070_rf_write(sc, 16, rf);
5903 /* initialize RF registers from ROM for >=RT3071*/
5906 if (sc->rf[i].reg == 0 || sc->rf[i].reg == 0xff)
5908 run_rt3070_rf_write(sc, sc->rf[i].reg, sc->rf[i].val);
5916 uint8_t bbp, rf;
5929 run_rt3070_rf_read(sc, 50, &rf);
5930 run_rt3070_rf_write(sc, 50, rf & ~RT3593_TX_LO2);
5932 run_rt3070_rf_read(sc, 51, &rf);
5933 rf = (rf & ~(RT3593_TX_LO1 | 0x0c)) |
5935 run_rt3070_rf_write(sc, 51, rf);
5937 run_rt3070_rf_read(sc, 38, &rf);
5938 run_rt3070_rf_write(sc, 38, rf & ~RT5390_RX_LO1);
5940 run_rt3070_rf_read(sc, 39, &rf);
5941 run_rt3070_rf_write(sc, 39, rf & ~RT5390_RX_LO2);
5943 run_rt3070_rf_read(sc, 1, &rf);
5944 run_rt3070_rf_write(sc, 1, rf & ~(RT3070_RF_BLOCK | RT3070_PLL_PD));
5946 run_rt3070_rf_read(sc, 30, &rf);
5947 rf = (rf & ~0x18) | 0x10;
5948 run_rt3070_rf_write(sc, 30, rf);
5986 uint8_t bbp, rf;
6006 run_rt3070_rf_read(sc, 38, &rf);
6007 run_rt3070_rf_write(sc, 38, rf & ~RT5390_RX_LO1);
6009 run_rt3070_rf_read(sc, 39, &rf);
6010 run_rt3070_rf_write(sc, 39, rf & ~RT5390_RX_LO2);
6016 run_rt3070_rf_read(sc, 30, &rf);
6017 rf = (rf & ~0x18) | 0x10;
6018 run_rt3070_rf_write(sc, 30, rf);
6079 uint8_t rf, tmp;
6081 run_rt3070_rf_read(sc, 17, &rf);
6082 tmp = rf;
6083 rf = (rf & ~0x7f) | (sc->freq & 0x7f);
6084 rf = MIN(rf, 0x5f);
6086 if (tmp != rf)
6087 run_mcu_cmd(sc, 0x74, (tmp << 8 ) | rf);