Lines Matching full:lna
2024 /* Read RSSI offsets and LNA gains from EEPROM. */
2049 sc->lna[2] = val >> 8; /* channel group 2 */
2072 sc->lna[3] = val >> 8; /* channel group 3 */
2076 sc->lna[0] = val & 0xff; /* channel group 0 */
2077 sc->lna[1] = val >> 8; /* channel group 1 */
2079 /* fix broken 5GHz LNA entries */
2080 if (sc->lna[2] == 0 || sc->lna[2] == 0xff) {
2082 "invalid LNA for channel group %d\n", 2);
2083 sc->lna[2] = sc->lna[1];
2085 if (sc->lna[3] == 0 || sc->lna[3] == 0xff) {
2087 "invalid LNA for channel group %d\n", 3);
2088 sc->lna[3] = sc->lna[1];
4013 run_bbp_write(sc, 62, 0x37 - sc->lna[group]);
4014 run_bbp_write(sc, 63, 0x37 - sc->lna[group]);
4015 run_bbp_write(sc, 64, 0x37 - sc->lna[group]);
4137 agc = 0x1c + sc->lna[0] * 2;
4139 agc = 0x2e + sc->lna[0];
4142 agc = 0x24 + sc->lna[group] * 2;
4144 agc = 0x22 + (sc->lna[group] * 5) / 3;
4146 agc = 0x32 + (sc->lna[group] * 5) / 3;
5393 delta -= sc->lna[1];
5395 delta -= sc->lna[2];
5397 delta -= sc->lna[3];
5399 delta = sc->rssi_2ghz[rxchain] - sc->lna[0];
5663 /* Disable the GPIO bits 4 and 7 for LNA PE control. */