Lines Matching +full:i2c +full:- +full:transfer +full:- +full:timeout +full:- +full:us
1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) 2005 Poul-Henning Kamp <phk@FreeBSD.org>
19 * 4. Neither the name of the author nor the names of any co-contributors
52 * 128-bit multicast hash table. The SiS 900 has a built-in MII-based
54 * Both chips offer the standard bit-bang MII interface as well as
111 #define SIS_LOCK(_sc) mtx_lock(&(_sc)->sis_mtx)
112 #define SIS_UNLOCK(_sc) mtx_unlock(&(_sc)->sis_mtx)
113 #define SIS_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sis_mtx, MA_OWNED)
118 #define CSR_WRITE_4(sc, reg, val) bus_write_4(sc->sis_res[0], reg, val)
120 #define CSR_READ_4(sc, reg) bus_read_4(sc->sis_res[0], reg)
122 #define CSR_READ_2(sc, reg) bus_read_2(sc->sis_res[0], reg)
125 bus_barrier(sc->sis_res[0], reg, length, flags)
170 * MII bit-bang glue
191 { -1, 0 }
228 for (idx = (300 / 33) + 1; idx > 0; idx--)
436 * Read the MII serial port for the MII bit-bang module.
453 * Write the MII serial port for the MII bit-bang module.
474 if (sc->sis_type == SIS_TYPE_83815) {
497 if (sc->sis_type == SIS_TYPE_900 &&
498 sc->sis_rev < SIS_REV_635) {
514 device_printf(sc->sis_dev,
537 if (sc->sis_type == SIS_TYPE_83815) {
549 if (sc->sis_type == SIS_TYPE_900 &&
550 sc->sis_rev < SIS_REV_635) {
566 device_printf(sc->sis_dev,
585 mii = device_get_softc(sc->sis_miibus);
586 ifp = sc->sis_ifp;
591 sc->sis_flags &= ~SIS_FLAG_LINK;
592 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
594 switch (IFM_SUBTYPE(mii->mii_media_active)) {
597 sc->sis_flags |= SIS_FLAG_LINK;
601 sc->sis_flags |= SIS_FLAG_LINK;
608 if ((sc->sis_flags & SIS_FLAG_LINK) == 0) {
619 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) {
629 if (sc->sis_type == SIS_TYPE_83815 && sc->sis_srr >= NS_SRR_16A) {
637 if (sc->sis_type == SIS_TYPE_83815 && sc->sis_srr < NS_SRR_16A &&
638 IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX) {
648 device_printf(sc->sis_dev,
671 * The NatSemi chip has a 512-bit filter, which is
672 * different than the SiS, so we special-case it.
674 if (sc->sis_type == SIS_TYPE_83815)
676 else if (sc->sis_rev >= SIS_REV_635 ||
677 sc->sis_rev == SIS_REV_900B)
689 if (sc->sis_type == SIS_TYPE_83815)
707 bit -= 0x10;
719 ifp = sc->sis_ifp;
779 h = sis_mchash(ctx->sc, LLADDR(sdl));
780 ctx->hashes[h >> 4] |= 1 << (h & 0xf);
792 ifp = sc->sis_ifp;
795 if (sc->sis_rev >= SIS_REV_635 || sc->sis_rev == SIS_REV_900B)
850 device_printf(sc->sis_dev, "reset never completed\n");
859 if (sc->sis_type == SIS_TYPE_83815) {
879 while (t->sis_name != NULL) {
880 if ((pci_get_vendor(dev) == t->sis_vid) &&
881 (pci_get_device(dev) == t->sis_did)) {
882 device_set_desc(dev, t->sis_name);
905 sc->sis_dev = dev;
907 mtx_init(&sc->sis_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
909 callout_init_mtx(&sc->sis_stat_ch, &sc->sis_mtx, 0);
912 sc->sis_type = SIS_TYPE_900;
914 sc->sis_type = SIS_TYPE_7016;
916 sc->sis_type = SIS_TYPE_83815;
918 sc->sis_rev = pci_read_config(dev, PCIR_REVID, 1);
924 error = bus_alloc_resources(dev, sis_res_spec, sc->sis_res);
933 if (sc->sis_type == SIS_TYPE_900 &&
934 (sc->sis_rev == SIS_REV_635 ||
935 sc->sis_rev == SIS_REV_900B)) {
945 sc->sis_srr = CSR_READ_4(sc, NS_SRR);
948 if (sc->sis_srr == NS_SRR_15C)
950 else if (sc->sis_srr == NS_SRR_15D)
952 else if (sc->sis_srr == NS_SRR_16A)
955 device_printf(dev, "Silicon Revision %x\n", sc->sis_srr);
960 * you'd expect. The address spans 4 16-bit words,
1014 if (sc->sis_rev == SIS_REV_630S ||
1015 sc->sis_rev == SIS_REV_630E ||
1016 sc->sis_rev == SIS_REV_630EA1)
1019 else if (sc->sis_rev == SIS_REV_635 ||
1020 sc->sis_rev == SIS_REV_630ET)
1022 else if (sc->sis_rev == SIS_REV_96x) {
1041 * can operate on the i2c bus.
1059 ifp = sc->sis_ifp = if_alloc(IFT_ETHER);
1066 if_setsendqlen(ifp, SIS_TX_LIST_CNT - 1);
1069 if (pci_find_cap(sc->sis_dev, PCIY_PMG, &pmc) == 0) {
1070 if (sc->sis_type == SIS_TYPE_83815)
1080 error = mii_attach(dev, &sc->sis_miibus, ifp, sis_ifmedia_upd,
1103 error = bus_setup_intr(dev, sc->sis_res[1], INTR_TYPE_NET | INTR_MPSAFE,
1104 NULL, sis_intr, sc, &sc->sis_intrhand);
1133 KASSERT(mtx_initialized(&sc->sis_mtx), ("sis mutex not initialized"));
1134 ifp = sc->sis_ifp;
1146 callout_drain(&sc->sis_stat_ch);
1151 if (sc->sis_intrhand)
1152 bus_teardown_intr(dev, sc->sis_res[1], sc->sis_intrhand);
1153 bus_release_resources(dev, sis_res_spec, sc->sis_res);
1160 mtx_destroy(&sc->sis_mtx);
1180 ctx->sis_busaddr = segs[0].ds_addr;
1191 error = bus_dma_tag_create(sc->sis_parent_tag, alignment, 0,
1195 device_printf(sc->sis_dev,
1203 device_printf(sc->sis_dev,
1212 device_printf(sc->sis_dev,
1228 error = bus_dma_tag_create(bus_get_dma_tag(sc->sis_dev),
1231 0, NULL, NULL, &sc->sis_parent_tag);
1233 device_printf(sc->sis_dev,
1240 &sc->sis_rx_list_tag, (uint8_t **)&sc->sis_rx_list,
1241 &sc->sis_rx_list_map, &sc->sis_rx_paddr, "RX ring");
1247 &sc->sis_tx_list_tag, (uint8_t **)&sc->sis_tx_list,
1248 &sc->sis_tx_list_map, &sc->sis_tx_paddr, "TX ring");
1253 error = bus_dma_tag_create(sc->sis_parent_tag, SIS_RX_BUF_ALIGN, 0,
1255 MCLBYTES, 0, NULL, NULL, &sc->sis_rx_tag);
1257 device_printf(sc->sis_dev, "could not allocate RX dma tag\n");
1262 error = bus_dma_tag_create(sc->sis_parent_tag, 1, 0,
1265 &sc->sis_tx_tag);
1267 device_printf(sc->sis_dev, "could not allocate TX dma tag\n");
1272 error = bus_dmamap_create(sc->sis_rx_tag, 0, &sc->sis_rx_sparemap);
1274 device_printf(sc->sis_dev,
1279 rxd = &sc->sis_rxdesc[i];
1280 rxd->rx_m = NULL;
1281 error = bus_dmamap_create(sc->sis_rx_tag, 0, &rxd->rx_dmamap);
1283 device_printf(sc->sis_dev,
1291 txd = &sc->sis_txdesc[i];
1292 txd->tx_m = NULL;
1293 error = bus_dmamap_create(sc->sis_tx_tag, 0, &txd->tx_dmamap);
1295 device_printf(sc->sis_dev,
1313 rxd = &sc->sis_rxdesc[i];
1314 if (rxd->rx_dmamap)
1315 bus_dmamap_destroy(sc->sis_rx_tag, rxd->rx_dmamap);
1317 if (sc->sis_rx_sparemap)
1318 bus_dmamap_destroy(sc->sis_rx_tag, sc->sis_rx_sparemap);
1322 txd = &sc->sis_txdesc[i];
1323 if (txd->tx_dmamap)
1324 bus_dmamap_destroy(sc->sis_tx_tag, txd->tx_dmamap);
1327 if (sc->sis_rx_tag)
1328 bus_dma_tag_destroy(sc->sis_rx_tag);
1329 if (sc->sis_tx_tag)
1330 bus_dma_tag_destroy(sc->sis_tx_tag);
1333 if (sc->sis_rx_paddr)
1334 bus_dmamap_unload(sc->sis_rx_list_tag, sc->sis_rx_list_map);
1335 if (sc->sis_rx_list)
1336 bus_dmamem_free(sc->sis_rx_list_tag, sc->sis_rx_list,
1337 sc->sis_rx_list_map);
1339 if (sc->sis_rx_list_tag)
1340 bus_dma_tag_destroy(sc->sis_rx_list_tag);
1343 if (sc->sis_tx_paddr)
1344 bus_dmamap_unload(sc->sis_tx_list_tag, sc->sis_tx_list_map);
1346 if (sc->sis_tx_list)
1347 bus_dmamem_free(sc->sis_tx_list_tag, sc->sis_tx_list,
1348 sc->sis_tx_list_map);
1350 if (sc->sis_tx_list_tag)
1351 bus_dma_tag_destroy(sc->sis_tx_list_tag);
1354 if (sc->sis_parent_tag)
1355 bus_dma_tag_destroy(sc->sis_parent_tag);
1371 bzero(&sc->sis_tx_list[0], SIS_TX_LIST_SZ);
1373 txd = &sc->sis_txdesc[i];
1374 txd->tx_m = NULL;
1375 if (i == SIS_TX_LIST_CNT - 1)
1379 sc->sis_tx_list[i].sis_next = htole32(SIS_ADDR_LO(next));
1381 sc->sis_tx_prod = sc->sis_tx_cons = sc->sis_tx_cnt = 0;
1382 bus_dmamap_sync(sc->sis_tx_list_tag, sc->sis_tx_list_map,
1385 sc->sis_rx_cons = 0;
1386 bzero(&sc->sis_rx_list[0], SIS_RX_LIST_SZ);
1388 rxd = &sc->sis_rxdesc[i];
1389 rxd->rx_desc = &sc->sis_rx_list[i];
1390 if (i == SIS_RX_LIST_CNT - 1)
1394 rxd->rx_desc->sis_next = htole32(SIS_ADDR_LO(next));
1399 bus_dmamap_sync(sc->sis_rx_list_tag, sc->sis_rx_list_map,
1419 m->m_len = m->m_pkthdr.len = SIS_RXLEN;
1424 if (bus_dmamap_load_mbuf_sg(sc->sis_rx_tag, sc->sis_rx_sparemap, m,
1431 if (rxd->rx_m != NULL) {
1432 bus_dmamap_sync(sc->sis_rx_tag, rxd->rx_dmamap,
1434 bus_dmamap_unload(sc->sis_rx_tag, rxd->rx_dmamap);
1436 map = rxd->rx_dmamap;
1437 rxd->rx_dmamap = sc->sis_rx_sparemap;
1438 sc->sis_rx_sparemap = map;
1439 bus_dmamap_sync(sc->sis_rx_tag, rxd->rx_dmamap, BUS_DMASYNC_PREREAD);
1440 rxd->rx_m = m;
1441 rxd->rx_desc->sis_ptr = htole32(SIS_ADDR_LO(segs[0].ds_addr));
1442 rxd->rx_desc->sis_cmdsts = htole32(SIS_RXLEN);
1450 rxd->rx_desc->sis_cmdsts = htole32(SIS_RXLEN);
1461 dst = src - (SIS_RX_BUF_ALIGN - ETHER_ALIGN) / sizeof(*src);
1463 for (i = 0; i < (m->m_len / sizeof(uint16_t) + 1); i++)
1466 m->m_data -= SIS_RX_BUF_ALIGN - ETHER_ALIGN;
1486 bus_dmamap_sync(sc->sis_rx_list_tag, sc->sis_rx_list_map,
1489 rx_cons = sc->sis_rx_cons;
1490 ifp = sc->sis_ifp;
1496 if (sc->rxcycles <= 0)
1498 sc->rxcycles--;
1501 cur_rx = &sc->sis_rx_list[rx_cons];
1502 rxstat = le32toh(cur_rx->sis_cmdsts);
1505 rxd = &sc->sis_rxdesc[rx_cons];
1507 total_len = (rxstat & SIS_CMDSTS_BUFLEN) - ETHER_CRC_LEN;
1509 total_len <= (ETHER_MAX_LEN + ETHER_VLAN_ENCAP_LEN -
1521 m = rxd->rx_m;
1529 m->m_pkthdr.len = m->m_len = total_len;
1540 m->m_pkthdr.rcvif = ifp;
1549 sc->sis_rx_cons = rx_cons;
1550 bus_dmamap_sync(sc->sis_rx_list_tag, sc->sis_rx_list_map,
1558 * A frame was downloaded to the chip. It's safe for us to clean up
1572 cons = sc->sis_tx_cons;
1573 if (cons == sc->sis_tx_prod)
1576 ifp = sc->sis_ifp;
1577 bus_dmamap_sync(sc->sis_tx_list_tag, sc->sis_tx_list_map,
1584 for (; cons != sc->sis_tx_prod; SIS_INC(cons, SIS_TX_LIST_CNT)) {
1585 cur_tx = &sc->sis_tx_list[cons];
1586 txstat = le32toh(cur_tx->sis_cmdsts);
1589 txd = &sc->sis_txdesc[cons];
1590 if (txd->tx_m != NULL) {
1591 bus_dmamap_sync(sc->sis_tx_tag, txd->tx_dmamap,
1593 bus_dmamap_unload(sc->sis_tx_tag, txd->tx_dmamap);
1594 m_freem(txd->tx_m);
1595 txd->tx_m = NULL;
1608 sc->sis_tx_cnt--;
1611 sc->sis_tx_cons = cons;
1612 if (sc->sis_tx_cnt == 0)
1613 sc->sis_watchdog_timer = 0;
1625 mii = device_get_softc(sc->sis_miibus);
1628 if ((sc->sis_flags & SIS_FLAG_LINK) == 0)
1629 sis_miibus_statchg(sc->sis_dev);
1630 callout_reset(&sc->sis_stat_ch, hz, sis_tick, sc);
1655 sc->rxcycles = count;
1661 if (sc->rxcycles > 0 || cmd == POLL_AND_CHECK_STATUS) {
1692 ifp = sc->sis_ifp;
1741 /* Re-enable interrupts. */
1766 prod = sc->sis_tx_prod;
1767 txd = &sc->sis_txdesc[prod];
1768 if ((sc->sis_flags & SIS_FLAG_MANUAL_PAD) != 0 &&
1769 (*m_head)->m_pkthdr.len < SIS_MIN_FRAMELEN) {
1771 padlen = SIS_MIN_FRAMELEN - m->m_pkthdr.len;
1782 if (m->m_next != NULL || M_TRAILINGSPACE(m) < padlen) {
1794 bzero(mtod(m, char *) + m->m_pkthdr.len, padlen);
1795 m->m_pkthdr.len += padlen;
1796 m->m_len = m->m_pkthdr.len;
1799 error = bus_dmamap_load_mbuf_sg(sc->sis_tx_tag, txd->tx_dmamap,
1809 error = bus_dmamap_load_mbuf_sg(sc->sis_tx_tag, txd->tx_dmamap,
1820 if (sc->sis_tx_cnt + nsegs > SIS_TX_LIST_CNT - 1) {
1821 bus_dmamap_unload(sc->sis_tx_tag, txd->tx_dmamap);
1825 bus_dmamap_sync(sc->sis_tx_tag, txd->tx_dmamap, BUS_DMASYNC_PREWRITE);
1829 f = &sc->sis_tx_list[prod];
1831 f->sis_cmdsts = htole32(segs[i].ds_len |
1834 f->sis_cmdsts = htole32(segs[i].ds_len |
1836 f->sis_ptr = htole32(SIS_ADDR_LO(segs[i].ds_addr));
1838 sc->sis_tx_cnt++;
1842 sc->sis_tx_prod = prod;
1845 prod = (prod - 1) & (SIS_TX_LIST_CNT - 1);
1846 f = &sc->sis_tx_list[prod];
1847 f->sis_cmdsts &= ~htole32(SIS_CMDSTS_MORE);
1849 /* Lastly transfer ownership of packet to the controller. */
1850 f = &sc->sis_tx_list[frag];
1851 f->sis_cmdsts |= htole32(SIS_CMDSTS_OWN);
1854 map = txd->tx_dmamap;
1855 txd->tx_dmamap = sc->sis_txdesc[prod].tx_dmamap;
1856 sc->sis_txdesc[prod].tx_dmamap = map;
1857 sc->sis_txdesc[prod].tx_m = *m_head;
1885 IFF_DRV_RUNNING || (sc->sis_flags & SIS_FLAG_LINK) == 0)
1889 sc->sis_tx_cnt < SIS_TX_LIST_CNT - 4;) {
1913 bus_dmamap_sync(sc->sis_tx_list_tag, sc->sis_tx_list_map,
1918 * Set a timeout in case the chip goes out to lunch.
1920 sc->sis_watchdog_timer = 5;
1937 if_t ifp = sc->sis_ifp;
1955 if (sc->sis_type == SIS_TYPE_83815 && sc->sis_srr >= NS_SRR_16A) {
1964 mii = device_get_softc(sc->sis_miibus);
1967 eaddr = if_getlladdr(sc->sis_ifp);
1968 if (sc->sis_type == SIS_TYPE_83815) {
1986 device_printf(sc->sis_dev,
1992 if (sc->sis_type == SIS_TYPE_83815) {
1993 if (sc->sis_manual_pad != 0)
1994 sc->sis_flags |= SIS_FLAG_MANUAL_PAD;
1996 sc->sis_flags &= ~SIS_FLAG_MANUAL_PAD;
2006 if (sc->sis_type == SIS_TYPE_83815 && sc->sis_srr <= NS_SRR_15D) {
2023 CSR_WRITE_4(sc, SIS_RX_LISTPTR, SIS_ADDR_LO(sc->sis_rx_paddr));
2024 CSR_WRITE_4(sc, SIS_TX_LISTPTR, SIS_ADDR_LO(sc->sis_tx_paddr));
2063 sc->sis_flags &= ~SIS_FLAG_LINK;
2069 callout_reset(&sc->sis_stat_ch, hz, sis_tick, sc);
2086 mii = device_get_softc(sc->sis_miibus);
2087 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
2107 mii = device_get_softc(sc->sis_miibus);
2109 ifmr->ifm_active = mii->mii_media_active;
2110 ifmr->ifm_status = mii->mii_media_status;
2127 ((if_getflags(ifp) ^ sc->sis_if_flags) &
2134 sc->sis_if_flags = if_getflags(ifp);
2146 mii = device_get_softc(sc->sis_miibus);
2147 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
2151 mask = ifr->ifr_reqcap ^ if_getcapenable(ifp);
2196 if (sc->sis_watchdog_timer == 0 || --sc->sis_watchdog_timer >0)
2199 device_printf(sc->sis_dev, "watchdog timeout\n");
2200 if_inc_counter(sc->sis_ifp, IFCOUNTER_OERRORS, 1);
2202 if_setdrvflagbits(sc->sis_ifp, 0, IFF_DRV_RUNNING);
2205 if (!if_sendq_empty(sc->sis_ifp))
2206 sis_startl(sc->sis_ifp);
2223 ifp = sc->sis_ifp;
2224 sc->sis_watchdog_timer = 0;
2226 callout_stop(&sc->sis_stat_ch);
2237 sc->sis_flags &= ~SIS_FLAG_LINK;
2243 rxd = &sc->sis_rxdesc[i];
2244 if (rxd->rx_m != NULL) {
2245 bus_dmamap_sync(sc->sis_rx_tag, rxd->rx_dmamap,
2247 bus_dmamap_unload(sc->sis_rx_tag, rxd->rx_dmamap);
2248 m_freem(rxd->rx_m);
2249 rxd->rx_m = NULL;
2257 txd = &sc->sis_txdesc[i];
2258 if (txd->tx_m != NULL) {
2259 bus_dmamap_sync(sc->sis_tx_tag, txd->tx_dmamap,
2261 bus_dmamap_unload(sc->sis_tx_tag, txd->tx_dmamap);
2262 m_freem(txd->tx_m);
2263 txd->tx_m = NULL;
2300 ifp = sc->sis_ifp;
2317 ifp = sc->sis_ifp;
2321 if (sc->sis_type == SIS_TYPE_83815) {
2342 if (pci_find_cap(sc->sis_dev, PCIY_PMG, &pmc) != 0)
2349 pmstat = pci_read_config(sc->sis_dev,
2354 pci_write_config(sc->sis_dev,
2365 ctx = device_get_sysctl_ctx(sc->sis_dev);
2366 children = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->sis_dev));
2375 sc->sis_manual_pad = 0;
2377 CTLFLAG_RWTUN, &sc->sis_manual_pad, 0, "Manually pad short frames");