Lines Matching +full:suspend +full:- +full:to +full:- +full:ram
1 /*-
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
66 struct r12a_softc *rs = sc->sc_priv; in r12a_check_condition()
72 "%d/%d (5 GHz)\n", __func__, cond[0], rs->ext_pa_2g, in r12a_check_condition()
73 rs->ext_lna_2g, rs->ext_pa_5g, rs->ext_lna_5g); in r12a_check_condition()
78 if (!rs->ext_pa_2g && !rs->ext_lna_2g && in r12a_check_condition()
79 !rs->ext_pa_5g && !rs->ext_lna_5g) in r12a_check_condition()
83 if (rs->ext_pa_2g) { in r12a_check_condition()
85 mask[nmasks] |= R12A_COND_TYPE(rs->type_pa_2g); in r12a_check_condition()
88 if (rs->ext_pa_5g) { in r12a_check_condition()
90 mask[nmasks] |= R12A_COND_TYPE(rs->type_pa_5g); in r12a_check_condition()
93 if (rs->ext_lna_2g) { in r12a_check_condition()
95 mask[nmasks] |= R12A_COND_TYPE(rs->type_lna_2g); in r12a_check_condition()
98 if (rs->ext_lna_5g) { in r12a_check_condition()
100 mask[nmasks] |= R12A_COND_TYPE(rs->type_lna_5g); in r12a_check_condition()
149 for (i = 0; i < sc->bb_size; i++) { in r12a_init_bb()
150 const struct rtwn_bb_prog *bb_prog = &sc->bb_prog[i]; in r12a_init_bb()
152 while (!rtwn_check_condition(sc, bb_prog->cond)) { in r12a_init_bb()
153 KASSERT(bb_prog->next != NULL, in r12a_init_bb()
156 bb_prog = bb_prog->next; in r12a_init_bb()
159 for (j = 0; j < bb_prog->count; j++) { in r12a_init_bb()
162 bb_prog->reg[j], bb_prog->val[j]); in r12a_init_bb()
164 rtwn_bb_write(sc, bb_prog->reg[j], bb_prog->val[j]); in r12a_init_bb()
172 for (i = 0; i < sc->agc_size; i++) { in r12a_init_bb()
173 const struct rtwn_agc_prog *agc_prog = &sc->agc_prog[i]; in r12a_init_bb()
175 while (!rtwn_check_condition(sc, agc_prog->cond)) { in r12a_init_bb()
176 KASSERT(agc_prog->next != NULL, in r12a_init_bb()
179 agc_prog = agc_prog->next; in r12a_init_bb()
182 for (j = 0; j < agc_prog->count; j++) { in r12a_init_bb()
184 "AGC: val 0x%08x\n", agc_prog->val[j]); in r12a_init_bb()
186 rtwn_bb_write(sc, 0x81c, agc_prog->val[j]); in r12a_init_bb()
191 for (i = 0; i < sc->nrxchains; i++) { in r12a_init_bb()
201 sc->sc_flags |= RTWN_FLAG_CCK_HIPWR; in r12a_init_bb()
209 for (chain = 0, i = 0; chain < sc->nrxchains; chain++, i++) { in r12a_init_rf()
211 i += r92c_init_rf_chain(sc, &sc->rf_prog[i], chain); in r12a_init_rf()
218 struct r12a_softc *rs = sc->sc_priv; in r12a_crystalcap_write()
222 val = rs->crystalcap & 0x3f; in r12a_crystalcap_write()
271 /* Enable WL suspend. */ in r12a_power_on()
290 device_printf(sc->sc_dev, in r12a_power_on()
295 /* Disable WL suspend. */ in r12a_power_on()
316 ((sc->sc_hwcrypto != RTWN_CRYPTO_SW) ? R92C_CR_ENSEC : 0) | in r12a_power_on()
325 struct r12a_softc *rs = sc->sc_priv; in r12a_power_off()
333 /* Move card to Low Power state. */ in r12a_power_off()
345 device_printf(sc->sc_dev, "%s: failed to block Tx queues\n", in r12a_power_off()
350 /* Turn off 3-wire. */ in r12a_power_off()
369 /* Respond TxOK to scheduler */ in r12a_power_off()
372 /* If firmware in ram code, do reset. */ in r12a_power_off()
383 /* Move card to Disabled state. */ in r12a_power_off()
384 /* Turn off 3-wire. */ in r12a_power_off()
412 device_printf(sc->sc_dev, "%s: could not turn off MAC\n", in r12a_power_off()
450 /* SOP option to disable BG/MB. */ in r12a_power_off()
460 /* Enable WL suspend. */ in r12a_power_off()
464 rs->rs_flags &= ~R12A_IQK_RUNNING; in r12a_power_off()
482 sc->sc_ant = MS(reg, R92C_FPGA0_RFIFACEOE0_ANT); in r12a_init_antsel()